diff options
| -rw-r--r-- | Makefile.inc | 7 | ||||
| -rw-r--r-- | src/cpu/x86/Kconfig | 11 |
2 files changed, 17 insertions, 1 deletions
diff --git a/Makefile.inc b/Makefile.inc index 7c277e7180..dc8fa86195 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -798,7 +798,12 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y) # # Make sure that segment for .car.data is ignored while adding romstage. $(CONFIG_CBFS_PREFIX)/romstage-align := 64 -$(CONFIG_CBFS_PREFIX)/romstage-options := --xip -S .car.data -P $(CONFIG_XIP_ROM_SIZE) +$(CONFIG_CBFS_PREFIX)/romstage-options := --xip -S .car.data +# If XIP_ROM_SIZE isn't being used don't overly constrain romstage by passing +# -P with a default value. +ifneq ($(CONFIG_NO_FIXED_XIP_ROM_SIZE),y) +$(CONFIG_CBFS_PREFIX)/romstage-options += -P $(CONFIG_XIP_ROM_SIZE) +endif endif cbfs-files-y += $(CONFIG_CBFS_PREFIX)/ramstage diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index e80f02b0e1..74d87e2e9f 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -69,8 +69,19 @@ config TSC_SYNC_MFENCE to execute an mfence instruction in order to synchronize rdtsc. This is true for all modern Intel CPUs. +config NO_FIXED_XIP_ROM_SIZE + bool + default n + help + The XIP_ROM_SIZE Kconfig variable is used globally on x86 + with the assumption that all chipsets utilize this value. + For the chipsets which do not use the variable it can lead + to unnecessary alignment constraints in cbfs for romstage. + Therefore, allow those chipsets a path to not be burdened. + config XIP_ROM_SIZE hex + depends on !NO_FIXED_XIP_ROM_SIZE default ROM_SIZE if ROMCC default 0x10000 |