diff options
| -rw-r--r-- | src/soc/intel/tigerlake/romstage/fsp_params_tgl.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c index 072c99ea7e..3872b61cf7 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c @@ -145,6 +145,9 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->VtdBaseAddress[4] = TBT1_BASE_ADDRESS; m_cfg->VtdBaseAddress[5] = TBT2_BASE_ADDRESS; m_cfg->VtdBaseAddress[6] = TBT3_BASE_ADDRESS; + + /* Change VmxEnable UPD value according to ENABLE_VMX Kconfig */ + m_cfg->VmxEnable = CONFIG(ENABLE_VMX); } void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) |