diff options
| -rw-r--r-- | src/arch/i386/init/crt0_prologue.inc | 1 | ||||
| -rw-r--r-- | src/arch/i386/init/crt0_romcc_epilogue.inc | 11 | ||||
| -rw-r--r-- | src/cpu/intel/car/cache_as_ram.inc | 12 | ||||
| -rw-r--r-- | src/cpu/intel/model_106cx/cache_as_ram.inc | 12 | ||||
| -rw-r--r-- | src/cpu/intel/model_6ex/cache_as_ram.inc | 12 | ||||
| -rw-r--r-- | src/cpu/intel/model_6fx/cache_as_ram.inc | 12 | ||||
| -rw-r--r-- | src/cpu/via/car/cache_as_ram.inc | 13 | ||||
| -rw-r--r-- | src/include/cpu/x86/stack.h | 32 |
8 files changed, 44 insertions, 61 deletions
diff --git a/src/arch/i386/init/crt0_prologue.inc b/src/arch/i386/init/crt0_prologue.inc index 82aebe4607..225a003d8f 100644 --- a/src/arch/i386/init/crt0_prologue.inc +++ b/src/arch/i386/init/crt0_prologue.inc @@ -18,6 +18,7 @@ */ #include <cpu/x86/post_code.h> +#include <cpu/x86/stack.h> .section ".rom.data", "a", @progbits .section ".rom.text", "ax", @progbits diff --git a/src/arch/i386/init/crt0_romcc_epilogue.inc b/src/arch/i386/init/crt0_romcc_epilogue.inc index 9476607f1e..73107c913b 100644 --- a/src/arch/i386/init/crt0_romcc_epilogue.inc +++ b/src/arch/i386/init/crt0_romcc_epilogue.inc @@ -14,16 +14,7 @@ __main: movl %ebp, %esi - /* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This - * makes sure that we stay completely within the 1M-64K of memory that we - * preserve for suspend/resume. - */ - -#ifndef HIGH_MEMORY_SAVE -#warning Need a central place for HIGH_MEMORY_SAVE -#define HIGH_MEMORY_SAVE ( (1024 - 64) * 1024 ) -#endif - movl $(CONFIG_RAMBASE + HIGH_MEMORY_SAVE), %esp + movl $ROMSTAGE_STACK, %esp movl %esp, %ebp pushl %esi call copy_and_run diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc index 2f2a9ca81f..f6a7e12e0d 100644 --- a/src/cpu/intel/car/cache_as_ram.inc +++ b/src/cpu/intel/car/cache_as_ram.inc @@ -30,6 +30,7 @@ #define CacheSize CONFIG_DCACHE_RAM_SIZE #define CacheBase (0xd0000 - CacheSize) +#include <cpu/x86/stack.h> #include <cpu/x86/mtrr.h> /* Save the BIST result */ @@ -398,16 +399,7 @@ __main: movl %ebp, %esi - /* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This - * makes sure that we stay completely within the 1M-64K of memory that we - * preserve for suspend/resume. - */ - -#ifndef HIGH_MEMORY_SAVE -#warning Need a central place for HIGH_MEMORY_SAVE -#define HIGH_MEMORY_SAVE ( (1024 - 64) * 1024 ) -#endif - movl $(CONFIG_RAMBASE + HIGH_MEMORY_SAVE), %esp + movl $ROMSTAGE_STACK, %esp movl %esp, %ebp pushl %esi call copy_and_run diff --git a/src/cpu/intel/model_106cx/cache_as_ram.inc b/src/cpu/intel/model_106cx/cache_as_ram.inc index a2c12140a9..767c488d45 100644 --- a/src/cpu/intel/model_106cx/cache_as_ram.inc +++ b/src/cpu/intel/model_106cx/cache_as_ram.inc @@ -21,6 +21,7 @@ #define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE #define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE +#include <cpu/x86/stack.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> @@ -256,16 +257,7 @@ __main: movl %ebp, %esi - /* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This - * makes sure that we stay completely within the 1M-64K of memory that we - * preserve for suspend/resume. - */ - -#ifndef HIGH_MEMORY_SAVE -#warning Need a central place for HIGH_MEMORY_SAVE -#define HIGH_MEMORY_SAVE ( (1024 - 64) * 1024 ) -#endif - movl $(CONFIG_RAMBASE + HIGH_MEMORY_SAVE), %esp + movl $ROMSTAGE_STACK, %esp movl %esp, %ebp pushl %esi call copy_and_run diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc index 2b74918859..d4f5d8bf5e 100644 --- a/src/cpu/intel/model_6ex/cache_as_ram.inc +++ b/src/cpu/intel/model_6ex/cache_as_ram.inc @@ -21,6 +21,7 @@ #define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE #define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE +#include <cpu/x86/stack.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> @@ -256,16 +257,7 @@ __main: movl %ebp, %esi - /* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This - * makes sure that we stay completely within the 1M-64K of memory that we - * preserve for suspend/resume. - */ - -#ifndef HIGH_MEMORY_SAVE -#warning Need a central place for HIGH_MEMORY_SAVE -#define HIGH_MEMORY_SAVE ( (1024 - 64) * 1024 ) -#endif - movl $(CONFIG_RAMBASE + HIGH_MEMORY_SAVE), %esp + movl $ROMSTAGE_STACK, %esp movl %esp, %ebp pushl %esi call copy_and_run diff --git a/src/cpu/intel/model_6fx/cache_as_ram.inc b/src/cpu/intel/model_6fx/cache_as_ram.inc index da222af301..f46e5bdc48 100644 --- a/src/cpu/intel/model_6fx/cache_as_ram.inc +++ b/src/cpu/intel/model_6fx/cache_as_ram.inc @@ -21,6 +21,7 @@ #define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE #define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE +#include <cpu/x86/stack.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> @@ -270,16 +271,7 @@ __main: movl %ebp, %esi - /* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This - * makes sure that we stay completely within the 1M-64K of memory that we - * preserve for suspend/resume. - */ - -#ifndef HIGH_MEMORY_SAVE -#warning Need a central place for HIGH_MEMORY_SAVE -#define HIGH_MEMORY_SAVE ( (1024 - 64) * 1024 ) -#endif - movl $(CONFIG_RAMBASE + HIGH_MEMORY_SAVE), %esp + movl $ROMSTAGE_STACK, %esp movl %esp, %ebp pushl %esi call copy_and_run diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc index c49c3e4c2e..8a12c8fa48 100644 --- a/src/cpu/via/car/cache_as_ram.inc +++ b/src/cpu/via/car/cache_as_ram.inc @@ -28,7 +28,7 @@ #define CacheSize CONFIG_DCACHE_RAM_SIZE #define CacheBase CONFIG_DCACHE_RAM_BASE - +#include <cpu/x86/stack.h> #include <cpu/x86/mtrr.h> /* Save the BIST result */ @@ -270,16 +270,7 @@ __main: movl %ebp, %esi - /* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This - * makes sure that we stay completely within the 1M-64K of memory that we - * preserve for suspend/resume. - */ - -#ifndef HIGH_MEMORY_SAVE -#warning Need a central place for HIGH_MEMORY_SAVE -#define HIGH_MEMORY_SAVE ( (1024 - 64) * 1024 ) -#endif - movl $(CONFIG_RAMBASE + HIGH_MEMORY_SAVE), %esp + movl $ROMSTAGE_STACK, %esp movl %esp, %ebp pushl %esi call copy_and_run diff --git a/src/include/cpu/x86/stack.h b/src/include/cpu/x86/stack.h new file mode 100644 index 0000000000..d39764a7d6 --- /dev/null +++ b/src/include/cpu/x86/stack.h @@ -0,0 +1,32 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __CPU_X86_STACK_H +#define __CPU_X86_STACK_H + +/* For now: use CONFIG_RAMBASE + 1MB - 64K (counting downwards) as stack. This + * makes sure that we stay completely within the 1M-64K of memory that we + * preserve for suspend/resume. This is basically HIGH_MEMORY_SAFE (see + * cbmem.h) + */ + +#define ROMSTAGE_STACK_OFFSET ( (1024 - 64) * 1024 ) +#define ROMSTAGE_STACK (CONFIG_RAMBASE + ROMSTAGE_STACK_OFFSET) + +#endif |