diff options
| -rw-r--r-- | src/southbridge/intel/lynxpoint/chip.h | 7 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/sata.c | 10 |
2 files changed, 14 insertions, 3 deletions
diff --git a/src/southbridge/intel/lynxpoint/chip.h b/src/southbridge/intel/lynxpoint/chip.h index 1b4ac2a355..e47a0310be 100644 --- a/src/southbridge/intel/lynxpoint/chip.h +++ b/src/southbridge/intel/lynxpoint/chip.h @@ -81,6 +81,13 @@ struct southbridge_intel_lynxpoint_config { */ uint8_t sata_devslp_mux; + /* + * DEVSLP Disable + * 0: DEVSLP is enabled + * 1: DEVSLP is disabled + */ + uint8_t sata_devslp_disable; + uint32_t gen1_dec; uint32_t gen2_dec; uint32_t gen3_dec; diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c index a8d831955e..c2005402b1 100644 --- a/src/southbridge/intel/lynxpoint/sata.c +++ b/src/southbridge/intel/lynxpoint/sata.c @@ -172,10 +172,14 @@ static void sata_init(struct device *dev) /* CAP2 (HBA Capabilities Extended)*/ reg32 = read32(abar + 0x24); /* Enable DEVSLP */ - if (pch_is_lp()) - reg32 |= (1 << 5)|(1 << 4)|(1 << 3)|(1 << 2); - else + if (pch_is_lp()) { + if (config->sata_devslp_disable) + reg32 &= ~(1 << 3); + else + reg32 |= (1 << 5)|(1 << 4)|(1 << 3)|(1 << 2); + } else { reg32 &= ~0x00000002; + } write32(abar + 0x24, reg32); } else { printk(BIOS_DEBUG, "SATA: Controller in plain mode.\n"); |