diff options
| -rw-r--r-- | src/mainboard/google/butterfly/early_init.c | 12 | ||||
| -rw-r--r-- | src/mainboard/google/link/early_init.c | 10 | ||||
| -rw-r--r-- | src/mainboard/google/parrot/early_init.c | 5 | ||||
| -rw-r--r-- | src/mainboard/google/stout/early_init.c | 18 |
4 files changed, 2 insertions, 43 deletions
diff --git a/src/mainboard/google/butterfly/early_init.c b/src/mainboard/google/butterfly/early_init.c index d6566d1b09..19910bac99 100644 --- a/src/mainboard/google/butterfly/early_init.c +++ b/src/mainboard/google/butterfly/early_init.c @@ -28,13 +28,6 @@ #include <vendorcode/google/chromeos/chromeos.h> #endif -void mainboard_pch_lpc_setup(void) -{ - /* EC Decode Range Port60/64 and Port62/66 */ - /* Enable EC and PS/2 Keyboard/Mouse*/ - pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN); -} - void mainboard_late_rcba_config(void) { u32 reg32; @@ -76,11 +69,6 @@ void mainboard_late_rcba_config(void) DIR_ROUTE(D25IR, PIRQA, PIRQB, PIRQC, PIRQD); DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); - /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; - /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); - /* Disable unused devices (board specific) */ reg32 = RCBA32(FD); /* Disable PCI bridge so MRC does not probe this bus */ diff --git a/src/mainboard/google/link/early_init.c b/src/mainboard/google/link/early_init.c index 9d985e622c..8c58054463 100644 --- a/src/mainboard/google/link/early_init.c +++ b/src/mainboard/google/link/early_init.c @@ -34,9 +34,8 @@ void mainboard_pch_lpc_setup(void) { - /* Enable PS/2 Keyboard/Mouse, EC areas and COM1 */ - pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN | \ - GAMEL_LPC_EN | COMA_LPC_EN); + /* Enable additional 0x200..0x207 for EC */ + pci_or_config16(PCH_LPC_DEV, LPC_EN, GAMEL_LPC_EN); } void mainboard_late_rcba_config(void) @@ -74,11 +73,6 @@ void mainboard_late_rcba_config(void) DIR_ROUTE(D26IR, PIRQF, PIRQE, PIRQG, PIRQH); DIR_ROUTE(D25IR, PIRQA, PIRQB, PIRQC, PIRQD); DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); - - /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; - /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); } static uint8_t *locate_spd(void) diff --git a/src/mainboard/google/parrot/early_init.c b/src/mainboard/google/parrot/early_init.c index 3c07dc8c54..7310b01b7f 100644 --- a/src/mainboard/google/parrot/early_init.c +++ b/src/mainboard/google/parrot/early_init.c @@ -68,11 +68,6 @@ void mainboard_late_rcba_config(void) DIR_ROUTE(D25IR, PIRQA, PIRQB, PIRQC, PIRQD); DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); - /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; - /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); - /* Disable unused devices (board specific) */ reg32 = RCBA32(FD); /* Disable PCI bridge so MRC does not probe this bus */ diff --git a/src/mainboard/google/stout/early_init.c b/src/mainboard/google/stout/early_init.c index 6ee982ad73..94d409297c 100644 --- a/src/mainboard/google/stout/early_init.c +++ b/src/mainboard/google/stout/early_init.c @@ -30,19 +30,6 @@ #include "ec.h" #include "onboard.h" -void mainboard_pch_lpc_setup(void) -{ - /* - * Enable: - * EC Decode Range Port62/66 - * SuperIO Port2E/2F - * PS/2 Keyboard/Mouse Port60/64 - * FDD Port3F0h-3F5h and Port3F7h - */ - pci_write_config16(PCH_LPC_DEV, LPC_EN, KBC_LPC_EN | MC_LPC_EN | - CNF1_LPC_EN | FDD_LPC_EN); -} - void mainboard_late_rcba_config(void) { u32 reg32; @@ -85,11 +72,6 @@ void mainboard_late_rcba_config(void) DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); DIR_ROUTE(D20IR, PIRQD, PIRQE, PIRQF, PIRQG); - /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; - /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); - /* Disable unused devices (board specific) */ reg32 = RCBA32(FD); /* Disable PCI bridge so MRC does not probe this bus */ |