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-rw-r--r--Documentation/mainboard/index.md1
-rw-r--r--Documentation/mainboard/lenovo/Ivy_Bridge_series.md2
-rw-r--r--Documentation/mainboard/lenovo/x230s.md19
-rw-r--r--Documentation/mainboard/lenovo/x230s_bc_removed.jpgbin0 -> 42564 bytes
-rw-r--r--src/mainboard/lenovo/x230/Kconfig16
-rw-r--r--src/mainboard/lenovo/x230/Kconfig.name3
-rw-r--r--src/mainboard/lenovo/x230/variants/x230s/board_info.txt7
-rw-r--r--src/mainboard/lenovo/x230/variants/x230s/data.vbtbin0 -> 4280 bytes
-rw-r--r--src/mainboard/lenovo/x230/variants/x230s/early_init.c26
-rw-r--r--src/mainboard/lenovo/x230/variants/x230s/gma-mainboard.ads18
-rw-r--r--src/mainboard/lenovo/x230/variants/x230s/gpio.c212
-rw-r--r--src/mainboard/lenovo/x230/variants/x230s/hda_verb.c33
-rw-r--r--src/mainboard/lenovo/x230/variants/x230s/overridetree.cb33
13 files changed, 363 insertions, 7 deletions
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
index c5503e2616..c229b060d5 100644
--- a/Documentation/mainboard/index.md
+++ b/Documentation/mainboard/index.md
@@ -102,6 +102,7 @@ The boards in this section are not real mainboards, but emulators.
- [W530](lenovo/w530.md)
- [T430 / T530 / X230 / W530 common](lenovo/Ivy_Bridge_series.md)
- [T431s](lenovo/t431s.md)
+- [X230s](lenovo/x230s.md)
- [Internal flashing](lenovo/ivb_internal_flashing.md)
### Haswell series
diff --git a/Documentation/mainboard/lenovo/Ivy_Bridge_series.md b/Documentation/mainboard/lenovo/Ivy_Bridge_series.md
index f4f0efff6c..5f151663c4 100644
--- a/Documentation/mainboard/lenovo/Ivy_Bridge_series.md
+++ b/Documentation/mainboard/lenovo/Ivy_Bridge_series.md
@@ -1,6 +1,6 @@
# Lenovo Ivy Bridge series
-This information is valid for all supported models, except T430s and T431s.
+This information is valid for all supported models, except T430s, [T431s](t431s.md) and [X230s](x230s.md).
## Flashing coreboot
```eval_rst
diff --git a/Documentation/mainboard/lenovo/x230s.md b/Documentation/mainboard/lenovo/x230s.md
new file mode 100644
index 0000000000..845410e17b
--- /dev/null
+++ b/Documentation/mainboard/lenovo/x230s.md
@@ -0,0 +1,19 @@
+# ThinkPad Lenovo X230s
+
+## Disassembly Instructions
+
+You must remove the following parts to access the SPI flash chip:
+
+![x230s_bc_removed](x230s_bc_removed.jpg)
+
+* Base cover
+
+The [Hardware Maintenance Manual](https://download.lenovo.com/ibmdl/pub/pc/pccbbs/
+mobiles_pdf/x230s_hmm_en_0c10860_01.pdf) could be used as a guidance of disassembly.
+
+The SPI flash chip (W25Q128.V in the form of SOIC-8 for the author's X230s, but varying is possible)
+is located at the circled place.
+
+Unlike [most Ivy Bridge ThinkPads](Ivy_Bridge_series.md), X230s has a single 16MiB SPI flash chip.
+
+The general [flashing tutorial](../../flash_tutorial/index.md) has more details.
diff --git a/Documentation/mainboard/lenovo/x230s_bc_removed.jpg b/Documentation/mainboard/lenovo/x230s_bc_removed.jpg
new file mode 100644
index 0000000000..1735e8100b
--- /dev/null
+++ b/Documentation/mainboard/lenovo/x230s_bc_removed.jpg
Binary files differ
diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
index 8e5b857a92..39238f5690 100644
--- a/src/mainboard/lenovo/x230/Kconfig
+++ b/src/mainboard/lenovo/x230/Kconfig
@@ -1,4 +1,4 @@
-if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
+if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S
config BOARD_SPECIFIC_OPTIONS
def_bool y
@@ -9,18 +9,20 @@ config BOARD_SPECIFIC_OPTIONS
select EC_LENOVO_PMH7
select EC_LENOVO_H8
select H8_HAS_BAT_TRESHOLDS_IMPL
+ select H8_HAS_PRIMARY_FN_KEYS if BOARD_LENOVO_X230S
select NO_UART_ON_SUPERIO
- select BOARD_ROMSIZE_KB_12288
+ select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
+ select BOARD_ROMSIZE_KB_16384 if BOARD_LENOVO_X230S
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select HAVE_CMOS_DEFAULT
select HAVE_ACPI_RESUME
select INTEL_INT15
select DRIVERS_RICOH_RCE822
- select MAINBOARD_HAS_LPC_TPM
- select MAINBOARD_HAS_TPM1
+ select MAINBOARD_HAS_LPC_TPM if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
+ select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
select MAINBOARD_HAS_LIBGFXINIT
- select GFX_GMA_PANEL_1_ON_LVDS
+ select GFX_GMA_PANEL_1_ON_LVDS if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
select INTEL_GMA_HAVE_VBT
select MAINBOARD_USES_IFD_GBE_REGION
@@ -53,11 +55,13 @@ config MAINBOARD_DIR
config VARIANT_DIR
string
default "x230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
+ default "x230s" if BOARD_LENOVO_X230S
config MAINBOARD_PART_NUMBER
string
default "ThinkPad X230" if BOARD_LENOVO_X230
default "ThinkPad X230t" if BOARD_LENOVO_X230T
+ default "ThinkPad X230s" if BOARD_LENOVO_X230S
config OVERRIDE_DEVICETREE
string
@@ -88,4 +92,4 @@ config PS2M_EISAID
config THINKPADEC_HKEY_EISAID
default "LEN0068"
-endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
+endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S
diff --git a/src/mainboard/lenovo/x230/Kconfig.name b/src/mainboard/lenovo/x230/Kconfig.name
index 10fdc2ed11..1a01436879 100644
--- a/src/mainboard/lenovo/x230/Kconfig.name
+++ b/src/mainboard/lenovo/x230/Kconfig.name
@@ -3,3 +3,6 @@ config BOARD_LENOVO_X230
config BOARD_LENOVO_X230T
bool "ThinkPad X230t"
+
+config BOARD_LENOVO_X230S
+ bool "ThinkPad X230s"
diff --git a/src/mainboard/lenovo/x230/variants/x230s/board_info.txt b/src/mainboard/lenovo/x230/variants/x230s/board_info.txt
new file mode 100644
index 0000000000..67b229455a
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/board_info.txt
@@ -0,0 +1,7 @@
+Category: laptop
+Board name: ThinkPad X230s
+ROM package: SOIC-8
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: n
+Release year: 2013
diff --git a/src/mainboard/lenovo/x230/variants/x230s/data.vbt b/src/mainboard/lenovo/x230/variants/x230s/data.vbt
new file mode 100644
index 0000000000..42b0394daa
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/data.vbt
Binary files differ
diff --git a/src/mainboard/lenovo/x230/variants/x230s/early_init.c b/src/mainboard/lenovo/x230/variants/x230s/early_init.c
new file mode 100644
index 0000000000..362e7fa64a
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/early_init.c
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+
+const struct southbridge_usb_port mainboard_usb_ports[] = {
+ {1, 3, 0}, /* SSP1: Right */
+ {1, 3, 1}, /* SSP2: Left, EHCI Debug */
+ {0, 1, 3}, /* SSP3 */
+ {1, 3, -1}, /* B0P4: WWAN USB */
+ {0, 1, 2}, /* B0P5 */
+ {0, 1, -1}, /* B0P6 */
+ {0, 1, -1}, /* B0P7 */
+ {0, 1, -1}, /* B0P8 */
+ {0, 1, -1}, /* B1P1 */
+ {0, 1, 5}, /* B1P2 */
+ {1, 1, -1}, /* B1P3: Fingerprint Reader */
+ {0, 1, -1}, /* B1P4 */
+ {1, 3, -1}, /* B1P5: WLAN USB */
+ {1, 1, -1}, /* B1P6: Camera */
+};
+
+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
+{
+ read_spd(&spd[0], 0x50, id_only);
+}
diff --git a/src/mainboard/lenovo/x230/variants/x230s/gma-mainboard.ads b/src/mainboard/lenovo/x230/variants/x230s/gma-mainboard.ads
new file mode 100644
index 0000000000..fe9efd5686
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/gma-mainboard.ads
@@ -0,0 +1,18 @@
+-- SPDX-License-Identifier: GPL-2.0-or-later
+
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+
+ ports : constant Port_List :=
+ (DP1,
+ HDMI1,
+ Analog,
+ eDP,
+ others => Disabled);
+
+end GMA.Mainboard;
diff --git a/src/mainboard/lenovo/x230/variants/x230s/gpio.c b/src/mainboard/lenovo/x230/variants/x230s/gpio.c
new file mode 100644
index 0000000000..a216c6bab0
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/gpio.c
@@ -0,0 +1,212 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <southbridge/intel/common/gpio.h>
+
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
+ .gpio0 = GPIO_MODE_GPIO,
+ .gpio1 = GPIO_MODE_GPIO,
+ .gpio2 = GPIO_MODE_GPIO,
+ .gpio3 = GPIO_MODE_GPIO,
+ .gpio4 = GPIO_MODE_GPIO,
+ .gpio5 = GPIO_MODE_GPIO,
+ .gpio6 = GPIO_MODE_GPIO,
+ .gpio7 = GPIO_MODE_GPIO,
+ .gpio8 = GPIO_MODE_GPIO,
+ .gpio9 = GPIO_MODE_NATIVE,
+ .gpio10 = GPIO_MODE_GPIO,
+ .gpio11 = GPIO_MODE_NATIVE,
+ .gpio12 = GPIO_MODE_NATIVE,
+ .gpio13 = GPIO_MODE_GPIO,
+ .gpio14 = GPIO_MODE_NATIVE,
+ .gpio15 = GPIO_MODE_GPIO,
+ .gpio16 = GPIO_MODE_GPIO,
+ .gpio17 = GPIO_MODE_GPIO,
+ .gpio18 = GPIO_MODE_NATIVE,
+ .gpio19 = GPIO_MODE_GPIO,
+ .gpio20 = GPIO_MODE_NATIVE,
+ .gpio21 = GPIO_MODE_GPIO,
+ .gpio22 = GPIO_MODE_GPIO,
+ .gpio23 = GPIO_MODE_NATIVE,
+ .gpio24 = GPIO_MODE_GPIO,
+ .gpio25 = GPIO_MODE_NATIVE,
+ .gpio26 = GPIO_MODE_GPIO,
+ .gpio27 = GPIO_MODE_GPIO,
+ .gpio28 = GPIO_MODE_GPIO,
+ .gpio29 = GPIO_MODE_GPIO,
+ .gpio30 = GPIO_MODE_NATIVE,
+ .gpio31 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
+ .gpio0 = GPIO_DIR_INPUT,
+ .gpio1 = GPIO_DIR_INPUT,
+ .gpio2 = GPIO_DIR_INPUT,
+ .gpio3 = GPIO_DIR_INPUT,
+ .gpio4 = GPIO_DIR_INPUT,
+ .gpio5 = GPIO_DIR_INPUT,
+ .gpio6 = GPIO_DIR_INPUT,
+ .gpio7 = GPIO_DIR_INPUT,
+ .gpio8 = GPIO_DIR_OUTPUT,
+ .gpio10 = GPIO_DIR_OUTPUT,
+ .gpio13 = GPIO_DIR_INPUT,
+ .gpio15 = GPIO_DIR_OUTPUT,
+ .gpio16 = GPIO_DIR_INPUT,
+ .gpio17 = GPIO_DIR_INPUT,
+ .gpio19 = GPIO_DIR_INPUT,
+ .gpio21 = GPIO_DIR_INPUT,
+ .gpio22 = GPIO_DIR_OUTPUT,
+ .gpio24 = GPIO_DIR_OUTPUT,
+ .gpio26 = GPIO_DIR_INPUT,
+ .gpio27 = GPIO_DIR_INPUT,
+ .gpio28 = GPIO_DIR_OUTPUT,
+ .gpio29 = GPIO_DIR_OUTPUT,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
+ .gpio8 = GPIO_LEVEL_LOW,
+ .gpio10 = GPIO_LEVEL_HIGH,
+ .gpio15 = GPIO_LEVEL_LOW,
+ .gpio22 = GPIO_LEVEL_HIGH,
+ .gpio24 = GPIO_LEVEL_LOW,
+ .gpio28 = GPIO_LEVEL_LOW,
+ .gpio29 = GPIO_LEVEL_HIGH,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
+ .gpio24 = GPIO_RESET_RSMRST,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
+ .gpio1 = GPIO_INVERT,
+ .gpio6 = GPIO_INVERT,
+ .gpio13 = GPIO_INVERT,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
+ .gpio32 = GPIO_MODE_NATIVE,
+ .gpio33 = GPIO_MODE_GPIO,
+ .gpio34 = GPIO_MODE_GPIO,
+ .gpio35 = GPIO_MODE_GPIO,
+ .gpio36 = GPIO_MODE_GPIO,
+ .gpio37 = GPIO_MODE_GPIO,
+ .gpio38 = GPIO_MODE_GPIO,
+ .gpio39 = GPIO_MODE_GPIO,
+ .gpio40 = GPIO_MODE_NATIVE,
+ .gpio41 = GPIO_MODE_NATIVE,
+ .gpio42 = GPIO_MODE_NATIVE,
+ .gpio43 = GPIO_MODE_GPIO,
+ .gpio44 = GPIO_MODE_GPIO,
+ .gpio45 = GPIO_MODE_GPIO,
+ .gpio46 = GPIO_MODE_NATIVE,
+ .gpio47 = GPIO_MODE_GPIO,
+ .gpio48 = GPIO_MODE_GPIO,
+ .gpio49 = GPIO_MODE_GPIO,
+ .gpio50 = GPIO_MODE_GPIO,
+ .gpio51 = GPIO_MODE_GPIO,
+ .gpio52 = GPIO_MODE_GPIO,
+ .gpio53 = GPIO_MODE_GPIO,
+ .gpio54 = GPIO_MODE_GPIO,
+ .gpio55 = GPIO_MODE_GPIO,
+ .gpio56 = GPIO_MODE_GPIO,
+ .gpio57 = GPIO_MODE_GPIO,
+ .gpio58 = GPIO_MODE_NATIVE,
+ .gpio59 = GPIO_MODE_NATIVE,
+ .gpio60 = GPIO_MODE_NATIVE,
+ .gpio61 = GPIO_MODE_NATIVE,
+ .gpio62 = GPIO_MODE_NATIVE,
+ .gpio63 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
+ .gpio33 = GPIO_DIR_OUTPUT,
+ .gpio34 = GPIO_DIR_INPUT,
+ .gpio35 = GPIO_DIR_INPUT,
+ .gpio36 = GPIO_DIR_INPUT,
+ .gpio37 = GPIO_DIR_INPUT,
+ .gpio38 = GPIO_DIR_INPUT,
+ .gpio39 = GPIO_DIR_INPUT,
+ .gpio43 = GPIO_DIR_OUTPUT,
+ .gpio44 = GPIO_DIR_INPUT,
+ .gpio45 = GPIO_DIR_INPUT,
+ .gpio47 = GPIO_DIR_INPUT,
+ .gpio48 = GPIO_DIR_INPUT,
+ .gpio49 = GPIO_DIR_INPUT,
+ .gpio50 = GPIO_DIR_INPUT,
+ .gpio51 = GPIO_DIR_OUTPUT,
+ .gpio52 = GPIO_DIR_OUTPUT,
+ .gpio53 = GPIO_DIR_OUTPUT,
+ .gpio54 = GPIO_DIR_INPUT,
+ .gpio55 = GPIO_DIR_OUTPUT,
+ .gpio56 = GPIO_DIR_INPUT,
+ .gpio57 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
+ .gpio33 = GPIO_LEVEL_HIGH,
+ .gpio43 = GPIO_LEVEL_HIGH,
+ .gpio51 = GPIO_LEVEL_HIGH,
+ .gpio52 = GPIO_LEVEL_HIGH,
+ .gpio53 = GPIO_LEVEL_HIGH,
+ .gpio55 = GPIO_LEVEL_HIGH,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
+ .gpio64 = GPIO_MODE_GPIO,
+ .gpio65 = GPIO_MODE_GPIO,
+ .gpio66 = GPIO_MODE_GPIO,
+ .gpio67 = GPIO_MODE_GPIO,
+ .gpio68 = GPIO_MODE_GPIO,
+ .gpio69 = GPIO_MODE_GPIO,
+ .gpio70 = GPIO_MODE_GPIO,
+ .gpio71 = GPIO_MODE_GPIO,
+ .gpio72 = GPIO_MODE_NATIVE,
+ .gpio73 = GPIO_MODE_NATIVE,
+ .gpio74 = GPIO_MODE_NATIVE,
+ .gpio75 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
+ .gpio64 = GPIO_DIR_INPUT,
+ .gpio65 = GPIO_DIR_INPUT,
+ .gpio66 = GPIO_DIR_INPUT,
+ .gpio67 = GPIO_DIR_INPUT,
+ .gpio68 = GPIO_DIR_INPUT,
+ .gpio69 = GPIO_DIR_INPUT,
+ .gpio70 = GPIO_DIR_INPUT,
+ .gpio71 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
+};
+
+const struct pch_gpio_map mainboard_gpio_map = {
+ .set1 = {
+ .mode = &pch_gpio_set1_mode,
+ .direction = &pch_gpio_set1_direction,
+ .level = &pch_gpio_set1_level,
+ .blink = &pch_gpio_set1_blink,
+ .invert = &pch_gpio_set1_invert,
+ .reset = &pch_gpio_set1_reset,
+ },
+ .set2 = {
+ .mode = &pch_gpio_set2_mode,
+ .direction = &pch_gpio_set2_direction,
+ .level = &pch_gpio_set2_level,
+ .reset = &pch_gpio_set2_reset,
+ },
+ .set3 = {
+ .mode = &pch_gpio_set3_mode,
+ .direction = &pch_gpio_set3_direction,
+ .level = &pch_gpio_set3_level,
+ .reset = &pch_gpio_set3_reset,
+ },
+};
diff --git a/src/mainboard/lenovo/x230/variants/x230s/hda_verb.c b/src/mainboard/lenovo/x230/variants/x230s/hda_verb.c
new file mode 100644
index 0000000000..77919041e5
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/hda_verb.c
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+ 0x10ec0269, /* Codec Vendor / Device ID: Realtek */
+ 0x17aa2209, /* Subsystem ID */
+ 11, /* Number of 4 dword sets */
+ AZALIA_SUBVENDOR(0, 0x17aa2209),
+ AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
+ AZALIA_PIN_CFG(0, 0x14, 0x90170110),
+ AZALIA_PIN_CFG(0, 0x15, 0x03211020),
+ AZALIA_PIN_CFG(0, 0x17, 0x40008000),
+ AZALIA_PIN_CFG(0, 0x18, 0x03a11030),
+ AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1d, 0x40f38205),
+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+
+ 0x80862806, /* Codec Vendor / Device ID: Intel */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of 4 dword sets */
+ AZALIA_SUBVENDOR(3, 0x80860101),
+ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
+ AZALIA_PIN_CFG(3, 0x06, 0x58560020),
+ AZALIA_PIN_CFG(3, 0x07, 0x58560030),
+
+};
+
+const u32 pc_beep_verbs[0] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb
new file mode 100644
index 0000000000..6d37aabc01
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb
@@ -0,0 +1,33 @@
+chip northbridge/intel/sandybridge
+ # Enable DisplayPort Hotplug with 2ms pulse
+ register "gpu_dp_b_hotplug" = "4"
+ register "gpu_dp_c_hotplug" = "4"
+ register "gpu_dp_d_hotplug" = "4"
+
+ # Enable Panel as eDP and configure power delays
+ register "gpu_panel_port_select" = "1" # eDP
+ register "gpu_panel_power_backlight_off_delay" = "1" # 0.1ms
+ register "gpu_panel_power_backlight_on_delay" = "1" # 0.1ms
+ register "gpu_panel_power_down_delay" = "500" # 50ms
+ register "gpu_panel_power_up_delay" = "2000" # 200ms
+
+ device domain 0 on
+ subsystemid 0x17aa 0x2209 inherit
+ chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
+ # X230s does not support docking
+ # Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA)
+ register "sata_port_map" = "0x3"
+
+ device pci 1f.0 on # LPC bridge
+ chip ec/lenovo/h8
+ register "config1" = "0x05"
+ register "config3" = "0xc4"
+ register "event5_enable" = "0x3c"
+ register "evente_enable" = "0x1d"
+ # X230s only has BT on wlan card
+ register "has_bdc_detection" = "0"
+ end
+ end # LPC Controller
+ end
+ end
+end
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-03 17:14:30 +0000