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-rw-r--r--src/arch/arm/armv4/Makefile.inc1
-rw-r--r--src/mainboard/google/rush/romstage.c8
-rw-r--r--src/soc/nvidia/tegra132/Kconfig3
3 files changed, 11 insertions, 1 deletions
diff --git a/src/arch/arm/armv4/Makefile.inc b/src/arch/arm/armv4/Makefile.inc
index 6b516b9cf9..eab7f0f758 100644
--- a/src/arch/arm/armv4/Makefile.inc
+++ b/src/arch/arm/armv4/Makefile.inc
@@ -49,6 +49,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV4),y)
romstage-c-ccopts += $(armv4_flags)
romstage-S-ccopts += $(armv4_flags)
+romstage-y += cache.c
endif # CONFIG_ARCH_ROMSTAGE_ARMV4
diff --git a/src/mainboard/google/rush/romstage.c b/src/mainboard/google/rush/romstage.c
index e2b75f6842..f0de9c0dfb 100644
--- a/src/mainboard/google/rush/romstage.c
+++ b/src/mainboard/google/rush/romstage.c
@@ -20,11 +20,19 @@
#include <arch/stages.h>
#include <cbfs.h>
#include <console/console.h>
+#include <arch/exception.h>
void main(void)
{
void *entry;
+ console_init();
+ exception_init();
+
+ printk(BIOS_INFO, "T132: romstage here\n");
+
+ while (1);
+
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
stage_exit(entry);
}
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index 4dc71fe2c5..7e9aed820a 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -3,13 +3,14 @@ config SOC_NVIDIA_TEGRA132
default n
select ARCH_BOOTBLOCK_ARMV4
select ARCH_VERSTAGE_ARMV4
- select ARCH_ROMSTAGE_ARMV8_64
+ select ARCH_ROMSTAGE_ARMV4
select ARCH_RAMSTAGE_ARMV8_64
select ARM_LPAE
select DYNAMIC_CBMEM
select BOOTBLOCK_CONSOLE
select HAVE_UART_SPECIAL
select HAVE_UART_MEMORY_MAPPED
+ select EARLY_CONSOLE
select ARM_BOOTBLOCK_CUSTOM
if SOC_NVIDIA_TEGRA132