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-rw-r--r--src/northbridge/intel/pineview/raminit.c6
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c4
2 files changed, 8 insertions, 2 deletions
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index 5cece4147f..7f59d9197b 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -552,10 +552,12 @@ static void sdram_detect_ram_speed(struct sysinfo *s)
static void enable_hpet(void)
{
u32 reg32;
- reg32 = RCBA32(0x3404);
+ reg32 = RCBA32(HPTC);
reg32 &= ~0x3;
reg32 |= (1 << 7);
- RCBA32(0x3404) = reg32;
+ RCBA32(HPTC) = reg32;
+ /* On NM10 this only works if read back */
+ RCBA32(HPTC);
HPET32(0x10) = HPET32(0x10) | 1;
}
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 4e2f9f959e..62576c134a 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -310,6 +310,10 @@ static void enable_hpet(void)
reg32 |= (1 << 7); // HPET Address Enable
reg32 &= ~(3 << 0);
RCBA32(HPTC) = reg32;
+ /* On NM10 this only works if read back */
+ RCBA32(HPTC);
+
+ write32((u32 *)0xfed00010, read32((u32 *)0xfed00010) | 1);
}
static void enable_clock_gating(void)