aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/cpu/samsung/exynos5420/clock_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/samsung/exynos5420/clock_init.c b/src/cpu/samsung/exynos5420/clock_init.c
index 352163619c..07bf5d95c2 100644
--- a/src/cpu/samsung/exynos5420/clock_init.c
+++ b/src/cpu/samsung/exynos5420/clock_init.c
@@ -113,7 +113,7 @@ void system_clock_init(void)
/* Set CPLL */
writel(CPLL_CON1_VAL, &clk->cpll_con1);
- val = set_pll(0x6f, 0x2, 0x1);
+ val = set_pll(0xde, 0x4, 0x1);
writel(val, &clk->cpll_con0);
while ((readl(&clk->cpll_con0) & PLL_LOCKED) == 0)
;