diff options
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/reset.c | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/reset.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c index e3290384dc..ff77eb87d3 100644 --- a/src/southbridge/amd/agesa/hudson/reset.c +++ b/src/southbridge/amd/agesa/hudson/reset.c @@ -28,9 +28,9 @@ void cf9_reset_prepare(void) { u32 htic; - htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_s_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; - pci_io_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); + pci_s_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); } void do_board_reset(void) diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c index e3290384dc..ff77eb87d3 100644 --- a/src/southbridge/amd/pi/hudson/reset.c +++ b/src/southbridge/amd/pi/hudson/reset.c @@ -28,9 +28,9 @@ void cf9_reset_prepare(void) { u32 htic; - htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_s_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; - pci_io_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); + pci_s_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); } void do_board_reset(void) |