diff options
| -rw-r--r-- | src/soc/amd/common/block/acpimmio/mmio_util.c | 84 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/acpimmio.h | 65 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/iomap.h | 20 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/iomap.h | 20 |
4 files changed, 0 insertions, 189 deletions
diff --git a/src/soc/amd/common/block/acpimmio/mmio_util.c b/src/soc/amd/common/block/acpimmio/mmio_util.c index 7fad456106..1fc5fd4ed4 100644 --- a/src/soc/amd/common/block/acpimmio/mmio_util.c +++ b/src/soc/amd/common/block/acpimmio/mmio_util.c @@ -65,9 +65,6 @@ void pm_io_write32(uint8_t reg, uint32_t value) pm_io_write16(reg + sizeof(uint16_t), value & 0xffff); } -#if SUPPORTS_ACPIMMIO_SM_PCI_BASE -/* smbus pci read/write - access registers at 0xfed80000 */ - u8 sm_pci_read8(u8 reg) { return read8((void *)(ACPIMMIO_SM_PCI_BASE + reg)); @@ -97,10 +94,6 @@ void sm_pci_write32(u8 reg, u32 value) { write32((void *)(ACPIMMIO_SM_PCI_BASE + reg), value); } -#endif - -#if SUPPORTS_ACPIMMIO_SMI_BASE -/* smi read/write - access registers at 0xfed80200 */ uint8_t smi_read8(uint8_t reg) { @@ -131,10 +124,6 @@ void smi_write32(uint8_t reg, uint32_t value) { write32((void *)(ACPIMMIO_SMI_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_SMI_BASE */ - -#if SUPPORTS_ACPIMMIO_PMIO_BASE -/* pm read/write - access registers at 0xfed80300 */ u8 pm_read8(u8 reg) { @@ -165,14 +154,6 @@ void pm_write32(u8 reg, u32 value) { write32((void *)(ACPIMMIO_PMIO_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_PMIO_BASE */ - -#if SUPPORTS_ACPIMMIO_PMIO2_BASE -/* pm2 read/write - access registers at 0xfed80400 - currently unused by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_BIOSRAM_BASE -/* biosram read/write - access registers at 0xfed80500 */ uint8_t biosram_read8(uint8_t reg) { @@ -208,18 +189,6 @@ void biosram_write32(uint8_t reg, uint32_t value) value >>= 16; biosram_write16(reg + sizeof(uint16_t), value & 0xffff); } -#endif /* SUPPORTS_ACPIMMIO_BIOSRAM_BASE */ - -#if SUPPORTS_ACPIMMIO_CMOSRAM_BASE -/* cmosram read/write - access registers at 0xfed80600 - currently unused by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_CMOS_BASE -/* cmos read/write - access registers at 0xfed80700 - currently unused by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_ACPI_BASE -/* acpi read/write - access registers at 0xfed80800 */ u8 acpi_read8(u8 reg) { @@ -250,10 +219,6 @@ void acpi_write32(u8 reg, u32 value) { write32((void *)(ACPIMMIO_ACPI_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_ACPI_BASE */ - -#if SUPPORTS_ACPIMMIO_ASF_BASE -/* asf read/write - access registers at 0xfed80900 */ u8 asf_read8(u8 reg) { @@ -274,10 +239,6 @@ void asf_write16(u8 reg, u16 value) { write16((void *)(ACPIMMIO_ASF_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_ASF_BASE */ - -#if SUPPORTS_ACPIMMIO_SMBUS_BASE -/* smbus read/write - access registers at 0xfed80a00 */ u8 smbus_read8(u8 reg) { @@ -298,18 +259,6 @@ void smbus_write16(u8 reg, u16 value) { write16((void *)(ACPIMMIO_SMBUS_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_SMBUS_BASE */ - -#if SUPPORTS_ACPIMMIO_WDT_BASE -/* wdt read/write - access registers at 0xfed80b00 - not currently used by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_HPET_BASE -/* hpet read/write - access registers at 0xfed80c00 - not currently used by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_IOMUX_BASE -/* iomux read/write - access registers at 0xfed80d00 */ u8 iomux_read8(u8 reg) { @@ -340,10 +289,6 @@ void iomux_write32(u8 reg, u32 value) { write32((void *)(ACPIMMIO_IOMUX_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_IOMUX_BASE */ - -#if SUPPORTS_ACPIMMIO_MISC_BASE -/* misc read/write - access registers at 0xfed80e00 */ u8 misc_read8(u8 reg) { @@ -374,26 +319,6 @@ void misc_write32(u8 reg, u32 value) { write32((void *)(ACPIMMIO_MISC_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_MISC_BASE */ - -#if SUPPORTS_ACPIMMIO_DPVGA_BASE -/* dpvga read/write - access registers at 0xfed81400 - not currently used by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_GPIO0_BASE || SUPPORTS_ACPIMMIO_GPIO1_BASE \ - || SUPPORTS_ACPIMMIO_GPIO2_BASE -/* - * No helpers are currently in use however common/block//gpio.c accesses - * the registers directly. - */ - -/* gpio bk 0 read/write - access registers at 0xfed81500 */ -/* gpio bk 1 read/write - access registers at 0xfed81600 */ -/* gpio bk 2 read/write - access registers at 0xfed81700 */ -#endif - -#if SUPPORTS_ACPIMMIO_XHCIPM_BASE -/* xhci_pm read/write - access registers at 0xfed81c00 */ uint8_t xhci_pm_read8(uint8_t reg) { @@ -424,14 +349,6 @@ void xhci_pm_write32(uint8_t reg, uint32_t value) { write32((void *)(ACPIMMIO_XHCIPM_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_XHCIPM_BASE */ - -#if SUPPORTS_ACPIMMIO_ACDCTMR_BASE -/* acdc_tmr read/write - access registers at 0xfed81d00 - not currently used by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_AOAC_BASE -/* aoac read/write - access registers at 0xfed81e00 */ u8 aoac_read8(u8 reg) { @@ -442,4 +359,3 @@ void aoac_write8(u8 reg, u8 value) { write8((void *)(ACPIMMIO_AOAC_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_AOAC_BASE */ diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h index ca57cf5dcc..b395cdba9c 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h +++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h @@ -19,71 +19,6 @@ #define __AMDBLOCKS_ACPIMMIO_H__ #include <stdint.h> -/* iomap.h must indicate if the device uses a block, optional if unused. */ -#include <soc/iomap.h> -#ifndef SUPPORTS_ACPIMMIO_SM_PCI_BASE - #define SUPPORTS_ACPIMMIO_SM_PCI_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_SMI_BASE - #define SUPPORTS_ACPIMMIO_SMI_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_PMIO_BASE - #define SUPPORTS_ACPIMMIO_PMIO_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_PMIO2_BASE - #define SUPPORTS_ACPIMMIO_PMIO2_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_BIOSRAM_BASE - #define SUPPORTS_ACPIMMIO_BIOSRAM_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_CMOSRAM_BASE - #define SUPPORTS_ACPIMMIO_CMOSRAM_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_CMOS_BASE - #define SUPPORTS_ACPIMMIO_CMOS_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_ACPI_BASE - #define SUPPORTS_ACPIMMIO_ACPI_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_ASF_BASE - #define SUPPORTS_ACPIMMIO_ASF_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_SMBUS_BASE - #define SUPPORTS_ACPIMMIO_SMBUS_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_WDT_BASE - #define SUPPORTS_ACPIMMIO_WDT_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_HPET_BASE - #define SUPPORTS_ACPIMMIO_HPET_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_IOMUX_BASE - #define SUPPORTS_ACPIMMIO_IOMUX_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_MISC_BASE - #define SUPPORTS_ACPIMMIO_MISC_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_DPVGA_BASE - #define SUPPORTS_ACPIMMIO_DPVGA_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_GPIO0_BASE - #define SUPPORTS_ACPIMMIO_GPIO0_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_GPIO1_BASE - #define SUPPORTS_ACPIMMIO_GPIO1_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_GPIO2_BASE - #define SUPPORTS_ACPIMMIO_GPIO2_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_XHCIPM_BASE - #define SUPPORTS_ACPIMMIO_XHCIPM_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_ACDCTMR_BASE - #define SUPPORTS_ACPIMMIO_ACDCTMR_BASE 0 -#endif -#ifndef SUPPORTS_ACPIMMIO_AOAC_BASE - #define SUPPORTS_ACPIMMIO_AOAC_BASE 0 -#endif /* * The following AcpiMmio register block mapping represents definitions diff --git a/src/soc/amd/picasso/include/soc/iomap.h b/src/soc/amd/picasso/include/soc/iomap.h index 5037a1c2c5..b1d4bff48c 100644 --- a/src/soc/amd/picasso/include/soc/iomap.h +++ b/src/soc/amd/picasso/include/soc/iomap.h @@ -27,26 +27,6 @@ #endif #define HPET_BASE_ADDRESS 0xfed00000 -/* - * AcpiMmio blocks are at fixed offsets from FED8_0000h and enabled in PMx04[1]. - * All ranges not specified as supported below may, or may not, be listed in - * any documentation but should be considered reserved through FED8_1FFFh. - */ -#include <amdblocks/acpimmio_map.h> -#define SUPPORTS_ACPIMMIO_SM_PCI_BASE 1 /* 0xfed80000 */ -#define SUPPORTS_ACPIMMIO_SMI_BASE 1 /* 0xfed80100 */ -#define SUPPORTS_ACPIMMIO_PMIO_BASE 1 /* 0xfed80300 */ -#define SUPPORTS_ACPIMMIO_BIOSRAM_BASE 1 /* 0xfed80500 */ -#define SUPPORTS_ACPIMMIO_ACPI_BASE 1 /* 0xfed80800 */ -#define SUPPORTS_ACPIMMIO_ASF_BASE 1 /* 0xfed80900 */ -#define SUPPORTS_ACPIMMIO_SMBUS_BASE 1 /* 0xfed80a00 */ -#define SUPPORTS_ACPIMMIO_IOMUX_BASE 1 /* 0xfed80d00 */ -#define SUPPORTS_ACPIMMIO_MISC_BASE 1 /* 0xfed80e00 */ -#define SUPPORTS_ACPIMMIO_GPIO0_BASE 1 /* 0xfed81500 */ -#define SUPPORTS_ACPIMMIO_GPIO1_BASE 1 /* 0xfed81800 */ -#define SUPPORTS_ACPIMMIO_GPIO2_BASE 1 /* 0xfed81700 */ -#define SUPPORTS_ACPIMMIO_AOAC_BASE 1 /* 0xfed81e00 */ - #define ALINK_AHB_ADDRESS 0xfedc0000 /* Reserved 0xfecd1000-0xfedc3fff */ diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h index 612b6e871b..02997cc777 100644 --- a/src/soc/amd/stoneyridge/include/soc/iomap.h +++ b/src/soc/amd/stoneyridge/include/soc/iomap.h @@ -22,26 +22,6 @@ #define SPI_BASE_ADDRESS 0xfec10000 #define IO_APIC2_ADDR 0xfec20000 -/* - * AcpiMmio blocks are at fixed offsets from FED8_0000h and enabled in PMx04[1]. - * All ranges not specified as supported below may, or may not, be listed in - * any documentation but should be considered reserved through FED8_1FFFh. - */ -#include <amdblocks/acpimmio_map.h> -#define SUPPORTS_ACPIMMIO_SMI_BASE 1 /* 0xfed80100 */ -#define SUPPORTS_ACPIMMIO_PMIO_BASE 1 /* 0xfed80300 */ -#define SUPPORTS_ACPIMMIO_BIOSRAM_BASE 1 /* 0xfed80500 */ -#define SUPPORTS_ACPIMMIO_ACPI_BASE 1 /* 0xfed80800 */ -#define SUPPORTS_ACPIMMIO_ASF_BASE 1 /* 0xfed80900 */ -#define SUPPORTS_ACPIMMIO_SMBUS_BASE 1 /* 0xfed80a00 */ -#define SUPPORTS_ACPIMMIO_IOMUX_BASE 1 /* 0xfed80d00 */ -#define SUPPORTS_ACPIMMIO_MISC_BASE 1 /* 0xfed80e00 */ -#define SUPPORTS_ACPIMMIO_GPIO0_BASE 1 /* 0xfed81500 */ -#define SUPPORTS_ACPIMMIO_GPIO1_BASE 1 /* 0xfed81800 */ -#define SUPPORTS_ACPIMMIO_GPIO2_BASE 1 /* 0xfed81700 */ -#define SUPPORTS_ACPIMMIO_XHCIPM_BASE 1 /* 0xfed81c00 */ -#define SUPPORTS_ACPIMMIO_AOAC_BASE 1 /* 0xfed81e00 */ - #define ALINK_AHB_ADDRESS 0xfedc0000 /* I2C fixed address */ |