diff options
| -rw-r--r-- | src/mainboard/google/kahlee/OemCustomize.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/kahlee/bootblock/OemCustomize.c | 2 |
2 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c index 528c7b3b4b..bbb51e49dc 100644 --- a/src/mainboard/google/kahlee/OemCustomize.c +++ b/src/mainboard/google/kahlee/OemCustomize.c @@ -17,8 +17,6 @@ #include <agesawrapper.h> #include <PlatformMemoryConfiguration.h> -#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE - static const PSO_ENTRY DDR4PlatformMemoryConfiguration[] = { DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY), NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 1), diff --git a/src/mainboard/google/kahlee/bootblock/OemCustomize.c b/src/mainboard/google/kahlee/bootblock/OemCustomize.c index 9530169edc..7d86134a07 100644 --- a/src/mainboard/google/kahlee/bootblock/OemCustomize.c +++ b/src/mainboard/google/kahlee/bootblock/OemCustomize.c @@ -17,8 +17,6 @@ #include <agesawrapper.h> #include <PlatformMemoryConfiguration.h> -#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE - static const PCIe_PORT_DESCRIPTOR PortList[] = { /* Initialize Port descriptor (PCIe port, Lanes 7:4, D2F1) for NC*/ { |