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-rw-r--r--src/soc/rockchip/rk3399/sdram.c30
1 files changed, 18 insertions, 12 deletions
diff --git a/src/soc/rockchip/rk3399/sdram.c b/src/soc/rockchip/rk3399/sdram.c
index aa12e81e84..b0545213f6 100644
--- a/src/soc/rockchip/rk3399/sdram.c
+++ b/src/soc/rockchip/rk3399/sdram.c
@@ -182,34 +182,40 @@ static void set_ds_odt(u32 channel, const struct rk3399_sdram_params *params)
if (params->dramtype == LPDDR4) {
tsel_rd_select_p = PHY_DRV_ODT_Hi_Z;
+ tsel_rd_select_n = PHY_DRV_ODT_240;
+
tsel_wr_select_p = PHY_DRV_ODT_40;
- ca_tsel_wr_select_p = PHY_DRV_ODT_40;
+ tsel_wr_select_n = PHY_DRV_ODT_40;
+
tsel_idle_select_p = PHY_DRV_ODT_Hi_Z;
+ tsel_idle_select_n = PHY_DRV_ODT_240;
- tsel_rd_select_n = PHY_DRV_ODT_240;
- tsel_wr_select_n = PHY_DRV_ODT_40;
+ ca_tsel_wr_select_p = PHY_DRV_ODT_40;
ca_tsel_wr_select_n = PHY_DRV_ODT_40;
- tsel_idle_select_n = PHY_DRV_ODT_240;
} else if (params->dramtype == LPDDR3) {
tsel_rd_select_p = PHY_DRV_ODT_240;
+ tsel_rd_select_n = PHY_DRV_ODT_Hi_Z;
+
tsel_wr_select_p = PHY_DRV_ODT_34_3;
- ca_tsel_wr_select_p = PHY_DRV_ODT_48;
+ tsel_wr_select_n = PHY_DRV_ODT_34_3;
+
tsel_idle_select_p = PHY_DRV_ODT_240;
+ tsel_idle_select_n = PHY_DRV_ODT_Hi_Z;
- tsel_rd_select_n = PHY_DRV_ODT_Hi_Z;
- tsel_wr_select_n = PHY_DRV_ODT_34_3;
+ ca_tsel_wr_select_p = PHY_DRV_ODT_48;
ca_tsel_wr_select_n = PHY_DRV_ODT_48;
- tsel_idle_select_n = PHY_DRV_ODT_Hi_Z;
} else {
tsel_rd_select_p = PHY_DRV_ODT_240;
+ tsel_rd_select_n = PHY_DRV_ODT_240;
+
tsel_wr_select_p = PHY_DRV_ODT_34_3;
- ca_tsel_wr_select_p = PHY_DRV_ODT_34_3;
+ tsel_wr_select_n = PHY_DRV_ODT_34_3;
+
tsel_idle_select_p = PHY_DRV_ODT_240;
+ tsel_idle_select_n = PHY_DRV_ODT_240;
- tsel_rd_select_n = PHY_DRV_ODT_240;
- tsel_wr_select_n = PHY_DRV_ODT_34_3;
+ ca_tsel_wr_select_p = PHY_DRV_ODT_34_3;
ca_tsel_wr_select_n = PHY_DRV_ODT_34_3;
- tsel_idle_select_n = PHY_DRV_ODT_240;
}
if (params->odt == 1)