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-rw-r--r--Makefile.inc2
-rw-r--r--src/soc/intel/braswell/Makefile.inc2
-rw-r--r--src/soc/intel/skylake/Makefile.inc2
3 files changed, 3 insertions, 3 deletions
diff --git a/Makefile.inc b/Makefile.inc
index 63f9b0e159..917426f08a 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -60,7 +60,7 @@ coreboot: build-dirs $(obj)/coreboot.rom $(obj)/cbfstool $(obj)/rmodtool $(obj)/
# targets after the build completes by creating a Makefile.inc in the
# site-local directory with a target named 'build_complete::'
build_complete:: coreboot
- printf "\nBuilt %s (%s)\n" $(CONFIG_MAINBOARD_DIR) \
+ printf "\nBuilt %s (%s)\n" $(MAINBOARD_DIR) \
$(CONFIG_MAINBOARD_PART_NUMBER)
# This target can be used to run rules after all files were added to CBFS,
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc
index 867ce43f16..cfa5b4ce63 100644
--- a/src/soc/intel/braswell/Makefile.inc
+++ b/src/soc/intel/braswell/Makefile.inc
@@ -57,7 +57,7 @@ CPPFLAGS_common += -I$(src)/soc/intel/braswell/
CPPFLAGS_common += -I$(src)/soc/intel/braswell/include
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/braswell
-CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR)
+CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARD_DIR)
ifneq ($(CONFIG_GOP_SUPPORT),y)
ifneq ($(CONFIG_VGA_BIOS_FILE),)
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index 068b4cc28f..7b27c574c5 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -89,7 +89,7 @@ CPPFLAGS_common += -I$(src)/soc/intel/skylake/include
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/skylake
# Currently used for microcode path.
-CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR)
+CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARD_DIR)
ROMCCFLAGS := -mcpu=p4 -fno-simplify-phi -O2