diff options
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/chip.h | 5 |
2 files changed, 7 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 9b8cfd7bcf..4ea89710ab 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2015 - 2017 Intel Corp. - * Copyright (C) 2017 Siemens AG + * Copyright (C) 2017 - 2018 Siemens AG * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.) * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.) * @@ -616,6 +616,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) silconfig->EmmcRxStrobeCntl = cfg->emmc_rx_strobe_cntl; if (cfg->emmc_rx_cmd_data_cntl2 != 0) silconfig->EmmcRxCmdDataCntl2 = cfg->emmc_rx_cmd_data_cntl2; + if (cfg->emmc_host_max_speed != 0) + silconfig->eMMCHostMaxSpeed = cfg->emmc_host_max_speed; silconfig->LPSS_S0ixEnable = cfg->lpss_s0ix_enable; diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index 61ddedaf49..28d8634442 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2015 Intel Corp. - * Copyright (C) 2017 Siemens AG + * Copyright (C) 2017 - 2018 Siemens AG * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.) * * This program is free software; you can redistribute it and/or modify @@ -93,6 +93,9 @@ struct soc_intel_apollolake_config { */ uint32_t emmc_rx_cmd_data_cntl2; + /* Select the eMMC max speed allowed. */ + uint8_t emmc_host_max_speed; + /* Specifies on which IRQ the SCI will internally appear. */ uint8_t sci_irq; |