diff options
| -rw-r--r-- | src/soc/intel/skylake/acpi/gpio.asl | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/acpi/lpc.asl | 3 | ||||
| -rw-r--r-- | src/soc/intel/skylake/acpi/pch.asl | 40 | ||||
| -rw-r--r-- | src/soc/intel/skylake/acpi/platform.asl | 10 | ||||
| -rw-r--r-- | src/soc/intel/skylake/acpi/serialio.asl | 1 |
5 files changed, 28 insertions, 30 deletions
diff --git a/src/soc/intel/skylake/acpi/gpio.asl b/src/soc/intel/skylake/acpi/gpio.asl index 3b4740b8bf..7c2efa697f 100644 --- a/src/soc/intel/skylake/acpi/gpio.asl +++ b/src/soc/intel/skylake/acpi/gpio.asl @@ -18,10 +18,6 @@ * Foundation, Inc. */ -#include <soc/irq.h> -#include <soc/iomap.h> -#include <soc/pcr.h> -#include <soc/gpio_defs.h> /* PCR Register Access Methods PCR Dword Read arg0: PID arg1: Offset */ Method (PCRR, 2, Serialized) diff --git a/src/soc/intel/skylake/acpi/lpc.asl b/src/soc/intel/skylake/acpi/lpc.asl index 8332980730..877be991b4 100644 --- a/src/soc/intel/skylake/acpi/lpc.asl +++ b/src/soc/intel/skylake/acpi/lpc.asl @@ -19,7 +19,6 @@ * Foundation, Inc. */ -#include <soc/iomap.h> // Intel LPC Bus Device - 0:1f.0 @@ -169,8 +168,6 @@ Device (LPCB) }) } - #include "gpio.asl" - #include "irqlinks.asl" #include <acpi/ec.asl> #include <acpi/superio.asl> } diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl index 2621eb287d..18a41f25b3 100644 --- a/src/soc/intel/skylake/acpi/pch.asl +++ b/src/soc/intel/skylake/acpi/pch.asl @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2007-2009 coresystems GmbH - * Copyright (C) 2014 Google Inc. + * Copyright (C) 2015 Google Inc. * Copyright (C) 2015 Intel Corporation. * * This program is free software; you can redistribute it and/or modify @@ -20,38 +20,34 @@ */ #include <soc/iomap.h> +#include <soc/irq.h> +#include <soc/gpio_defs.h> +#include <soc/gpe.h> +#include <soc/pcr.h> -Scope (\) -{ - /* IO-Trap at 0x800. - * This is the ACPI->SMI communication interface. - */ - OperationRegion (IO_T, SystemIO, 0x800, 0x10) - Field (IO_T, ByteAcc, NoLock, Preserve) - { - Offset (0x8), - TRP0, 8 /* IO-Trap at 0x808 */ - } -} +/* GPIO Controller */ +#include "gpio.asl" + +/* Interrupt Routing */ +#include "irqlinks.asl" -/* PCI Express Ports 0:1c.x */ +/* LPC 0:1f.0 */ +#include "lpc.asl" + +/* PCIE Ports */ #include "pcie.asl" -/* USB XHCI 0:14.0 */ -#include "xhci.asl" -/* LPC Bridge 0:1f.0 */ -#include "lpc.asl" +/* Serial IO */ +#include "serialio.asl" /* SMBus 0:1f.3 */ #include "smbus.asl" -/* Serial IO */ -#include "serialio.asl" -/* Interrupt Routing */ #include "itss.asl" -#include "irqlinks.asl" +/* USB XHCI 0:14.0 */ +#include "xhci.asl" Method (_OSC, 4) { diff --git a/src/soc/intel/skylake/acpi/platform.asl b/src/soc/intel/skylake/acpi/platform.asl index 2bbe97be80..f0ed4e0816 100644 --- a/src/soc/intel/skylake/acpi/platform.asl +++ b/src/soc/intel/skylake/acpi/platform.asl @@ -36,6 +36,16 @@ Field (POST, ByteAcc, Lock, Preserve) DBG0, 8 } +/* IO-Trap at 0x800. + * This is the ACPI->SMI communication interface. + */ +OperationRegion (IO_T, SystemIO, 0x800, 0x10) +Field (IO_T, ByteAcc, NoLock, Preserve) +{ + Offset (0x8), + TRP0, 8 /* IO-Trap at 0x808 */ +} + /* SMI I/O Trap */ Method (TRAP, 1, Serialized) { diff --git a/src/soc/intel/skylake/acpi/serialio.asl b/src/soc/intel/skylake/acpi/serialio.asl index c6f5446a97..e57b937824 100644 --- a/src/soc/intel/skylake/acpi/serialio.asl +++ b/src/soc/intel/skylake/acpi/serialio.asl @@ -17,7 +17,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc. */ -#include <soc/irq.h> // Intel Serial IO Devices in ACPI Mode |