diff options
| -rw-r--r-- | src/mainboard/google/chell/devicetree.cb | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/chell/devicetree.cb b/src/mainboard/google/chell/devicetree.cb index dfa588a86f..05e37bfbfe 100644 --- a/src/mainboard/google/chell/devicetree.cb +++ b/src/mainboard/google/chell/devicetree.cb @@ -54,11 +54,11 @@ chip soc/intel/skylake register "PcieRpClkReqNumber[4]" = "2" register "usb2_ports[0]" = "USB2_PORT_TYPE_C" # Type-C Port 1 - register "usb2_ports[1]" = "USB2_PORT_MID" # Type-A Port - register "usb2_ports[2]" = "USB2_PORT_FLEX" # Camera + register "usb2_ports[2]" = "USB2_PORT_TYPE_C" # Type-C Port 2 register "usb2_ports[3]" = "USB2_PORT_MID" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_MID" # SD - register "usb2_ports[5]" = "USB2_PORT_TYPE_C" # Type-C Port 2 + register "usb2_ports[5]" = "USB2_PORT_MID" # Type-A Port + register "usb2_ports[7]" = "USB2_PORT_FLEX" # Camera + register "usb2_ports[9]" = "USB2_PORT_MID" # SD register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # Type-C Port 1 register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port 2 |