diff options
28 files changed, 29 insertions, 27 deletions
diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h index d86275354b..6950a38db3 100644 --- a/src/include/cpu/amd/car.h +++ b/src/include/cpu/amd/car.h @@ -1,6 +1,8 @@ #ifndef _CPU_AMD_CAR_H #define _CPU_AMD_CAR_H +void main(unsigned long bist); + void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); void done_cache_as_ram_main(void); void post_cache_as_ram(void); diff --git a/src/mainboard/aaeon/pfm-540i_revb/romstage.c b/src/mainboard/aaeon/pfm-540i_revb/romstage.c index 474a115952..946b825bb1 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/romstage.c +++ b/src/mainboard/aaeon/pfm-540i_revb/romstage.c @@ -25,6 +25,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <spd.h> @@ -49,7 +50,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl[] = { diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c index 8d7e42171a..d93e91623d 100644 --- a/src/mainboard/amd/db800/romstage.c +++ b/src/mainboard/amd/db800/romstage.c @@ -22,6 +22,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <spd.h> @@ -44,7 +45,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c index 93740696e3..b5e78532f6 100644 --- a/src/mainboard/amd/norwich/romstage.c +++ b/src/mainboard/amd/norwich/romstage.c @@ -22,6 +22,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <spd.h> @@ -40,7 +41,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index 6c52fc0f10..1d533bd1ca 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -20,6 +20,7 @@ #include <superio/winbond/w83627hf/w83627hf.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/gx2def.h> #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" @@ -43,7 +44,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/geode_gx2/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl [] = { diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c index ec505adb12..c8bd9cc310 100644 --- a/src/mainboard/artecgroup/dbe61/romstage.c +++ b/src/mainboard/artecgroup/dbe61/romstage.c @@ -22,6 +22,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include "spd_table.h" @@ -52,7 +53,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { diff --git a/src/mainboard/bachmann/ot200/romstage.c b/src/mainboard/bachmann/ot200/romstage.c index e8897ac44f..1908cd3d2c 100644 --- a/src/mainboard/bachmann/ot200/romstage.c +++ b/src/mainboard/bachmann/ot200/romstage.c @@ -24,6 +24,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include "southbridge/amd/cs5536/early_smbus.c" @@ -41,7 +42,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl[] = { diff --git a/src/mainboard/bcom/winnetp680/romstage.c b/src/mainboard/bcom/winnetp680/romstage.c index 40c87b6bae..f2144ffaab 100644 --- a/src/mainboard/bcom/winnetp680/romstage.c +++ b/src/mainboard/bcom/winnetp680/romstage.c @@ -23,6 +23,7 @@ #include <console/console.h> #include <northbridge/via/cn700/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/amd/car.h> #include <delay.h> #include <lib.h> #include <spd.h> @@ -75,7 +76,6 @@ static const struct mem_controller ctrl = { .channel0 = { DIMM0 }, }; -#include <cpu/intel/romstage.h> void main(unsigned long bist) { /* Enable multifunction for northbridge. */ diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c index d36555e0a3..93c00cc233 100644 --- a/src/mainboard/digitallogic/msm800sev/romstage.c +++ b/src/mainboard/digitallogic/msm800sev/romstage.c @@ -6,6 +6,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <cpu/amd/car.h> #include <southbridge/amd/cs5536/cs5536.h> @@ -29,7 +30,6 @@ int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c index c1a18349cf..db1c843a06 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c @@ -22,6 +22,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <spd.h> @@ -44,7 +45,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c index 77085e0c06..ed13641c6d 100644 --- a/src/mainboard/iei/pm-lx-800-r11/romstage.c +++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c @@ -23,6 +23,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <southbridge/amd/cs5536/early_smbus.c> @@ -48,7 +49,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include <cpu/amd/geode_lx/syspreinit.c> #include <cpu/amd/geode_lx/msrinit.c> -#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl[] = { diff --git a/src/mainboard/iei/pm-lx2-800-r10/romstage.c b/src/mainboard/iei/pm-lx2-800-r10/romstage.c index 653225a45b..9abeaf9627 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/romstage.c +++ b/src/mainboard/iei/pm-lx2-800-r10/romstage.c @@ -24,6 +24,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <southbridge/amd/cs5536/early_smbus.c> @@ -48,7 +49,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include <cpu/amd/geode_lx/syspreinit.c> #include <cpu/amd/geode_lx/msrinit.c> -#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl[] = { diff --git a/src/mainboard/jetway/j7f2/romstage.c b/src/mainboard/jetway/j7f2/romstage.c index 42aaa0c05c..0de239c6fa 100644 --- a/src/mainboard/jetway/j7f2/romstage.c +++ b/src/mainboard/jetway/j7f2/romstage.c @@ -23,6 +23,7 @@ #include <console/console.h> #include <northbridge/via/cn700/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/amd/car.h> #include <delay.h> #include "southbridge/via/vt8237r/early_smbus.c" #include <superio/fintek/common/fintek.h> @@ -80,7 +81,6 @@ static const struct mem_controller ctrl = { .channel0 = { DIMM0 }, }; -#include <cpu/intel/romstage.h> void main(unsigned long bist) { /* Enable multifunction for northbridge. */ diff --git a/src/mainboard/lippert/frontrunner/romstage.c b/src/mainboard/lippert/frontrunner/romstage.c index 1f33423ab0..15286e6039 100644 --- a/src/mainboard/lippert/frontrunner/romstage.c +++ b/src/mainboard/lippert/frontrunner/romstage.c @@ -8,6 +8,7 @@ #include <superio/winbond/w83627hf/w83627hf.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/gx2def.h> #include <southbridge/amd/cs5535/cs5535.h> #include "southbridge/amd/cs5535/early_smbus.c" @@ -69,7 +70,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_gx2/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl [] = { diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c index bf6dc9ffb7..0c9e03a4cd 100644 --- a/src/mainboard/lippert/hurricane-lx/romstage.c +++ b/src/mainboard/lippert/hurricane-lx/romstage.c @@ -25,6 +25,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <spd.h> @@ -105,7 +106,6 @@ static void mb_gpio_init(void) } } -#include <cpu/intel/romstage.h> void main(unsigned long bist) { diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c index a65b9b80b1..efe322c019 100644 --- a/src/mainboard/lippert/literunner-lx/romstage.c +++ b/src/mainboard/lippert/literunner-lx/romstage.c @@ -26,6 +26,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include "southbridge/amd/cs5536/early_smbus.c" @@ -145,7 +146,6 @@ static void mb_gpio_init(void) } } -#include <cpu/intel/romstage.h> void main(unsigned long bist) { int err; diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index d4a95e47b4..d70e2c1835 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -25,6 +25,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <spd.h> @@ -80,7 +81,6 @@ static void mb_gpio_init(void) } } -#include <cpu/intel/romstage.h> void main(unsigned long bist) { diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index 9486843072..b3a13ad4b2 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -26,6 +26,7 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include "southbridge/amd/cs5536/early_smbus.c" @@ -143,7 +144,6 @@ static void mb_gpio_init(void) } } -#include <cpu/intel/romstage.h> void main(unsigned long bist) { int err; diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index f770fa58c1..c497434d03 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -23,6 +23,7 @@ #include <lib.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <cpu/amd/car.h> #include <southbridge/amd/cs5536/cs5536.h> @@ -98,7 +99,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl[] = { diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c index 592efc3d96..b467098d15 100644 --- a/src/mainboard/pcengines/alix2d/romstage.c +++ b/src/mainboard/pcengines/alix2d/romstage.c @@ -23,6 +23,7 @@ #include <lib.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <cpu/amd/car.h> #include <southbridge/amd/cs5536/cs5536.h> @@ -121,7 +122,6 @@ static void mb_gpio_init(void) outl(1 << 11, GPIO_IO_BASE + GPIOH_OUTPUT_VALUE); /* Led 3 disabled */ } -#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl[] = { diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c index a985d8cfae..42c067f6a2 100644 --- a/src/mainboard/traverse/geos/romstage.c +++ b/src/mainboard/traverse/geos/romstage.c @@ -23,6 +23,7 @@ #include <lib.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <spd.h> @@ -41,7 +42,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl[] = { diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c index b71fe1cebc..a28bf784a2 100644 --- a/src/mainboard/via/epia-cn/romstage.c +++ b/src/mainboard/via/epia-cn/romstage.c @@ -24,6 +24,7 @@ #include <lib.h> #include <northbridge/via/cn700/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/amd/car.h> #include <delay.h> #include "southbridge/via/vt8237r/early_smbus.c" #include "southbridge/via/vt8237r/early_serial.c" @@ -73,7 +74,6 @@ static const struct mem_controller ctrl = { .channel0 = { DIMM0 }, }; -#include <cpu/intel/romstage.h> void main(unsigned long bist) { /* Enable multifunction for northbridge. */ diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c index 6878623300..9f2c14e3bf 100644 --- a/src/mainboard/via/epia-m700/romstage.c +++ b/src/mainboard/via/epia-m700/romstage.c @@ -30,6 +30,7 @@ #include <lib.h> #include <northbridge/via/vx800/vx800.h> #include <cpu/x86/bist.h> +#include <cpu/amd/car.h> #include <delay.h> #include <string.h> /* This file contains the board-special SI value for raminit.c. */ @@ -365,7 +366,6 @@ static void EmbedComInit(void) #endif /* cache_as_ram.inc jumps to here. */ -#include <cpu/intel/romstage.h> void main(unsigned long bist) { u16 boot_mode; diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index d40fd6910c..f3f0ec6e9d 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -26,6 +26,7 @@ #include <console/console.h> #include <lib.h> #include <cpu/x86/bist.h> +#include <cpu/amd/car.h> #include <string.h> #include <timestamp.h> @@ -37,7 +38,6 @@ #define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1) /* cache_as_ram.inc jumps to here. */ -#include <cpu/intel/romstage.h> void main(unsigned long bist) { u32 tolm; diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c index 17efa3812c..7d12e872d2 100644 --- a/src/mainboard/via/pc2500e/romstage.c +++ b/src/mainboard/via/pc2500e/romstage.c @@ -24,6 +24,7 @@ #include <lib.h> #include <northbridge/via/cn700/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/amd/car.h> #include <delay.h> #include "southbridge/via/vt8237r/early_smbus.c" #include <superio/ite/common/ite.h> @@ -49,7 +50,6 @@ static const struct mem_controller ctrl = { .channel0 = { DIMM0 }, /* TODO: CN700 currently only supports 1 DIMM. */ }; -#include <cpu/intel/romstage.h> void main(unsigned long bist) { /* Enable multifunction for northbridge. */ diff --git a/src/mainboard/via/vt8454c/romstage.c b/src/mainboard/via/vt8454c/romstage.c index f93b09a5e5..d2af46c5c8 100644 --- a/src/mainboard/via/vt8454c/romstage.c +++ b/src/mainboard/via/vt8454c/romstage.c @@ -23,6 +23,7 @@ #include <lib.h> #include <northbridge/via/cx700/raminit.h> #include <cpu/x86/bist.h> +#include <cpu/amd/car.h> #include <delay.h> #include "northbridge/via/cx700/early_smbus.c" #include "lib/debug.c" @@ -76,7 +77,6 @@ static void enable_shadow_ram(const struct mem_controller *ctrl) pci_write_config8(PCI_DEV(0, 0, 3), 0x83, shadowreg); } -#include <cpu/intel/romstage.h> void main(unsigned long bist) { /* Set statically so it should work with cx700 as well */ diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c index 37b70e1fd1..a47b9dc879 100644 --- a/src/mainboard/winent/pl6064/romstage.c +++ b/src/mainboard/winent/pl6064/romstage.c @@ -24,6 +24,7 @@ #include <lib.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <spd.h> @@ -46,7 +47,6 @@ int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c index fcfd94241e..9e6c5b27da 100644 --- a/src/mainboard/wyse/s50/romstage.c +++ b/src/mainboard/wyse/s50/romstage.c @@ -22,6 +22,7 @@ #include <lib.h> #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> +#include <cpu/amd/car.h> #include <cpu/amd/gx2def.h> #include <spd.h> #include "southbridge/amd/cs5536/early_smbus.c" @@ -43,7 +44,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include "cpu/amd/geode_gx2/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" -#include <cpu/intel/romstage.h> void main(unsigned long bist) { static const struct mem_controller memctrl [] = { |