diff options
| -rw-r--r-- | src/soc/intel/braswell/include/soc/lpc.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/braswell/southcluster.c | 13 |
2 files changed, 16 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/include/soc/lpc.h b/src/soc/intel/braswell/include/soc/lpc.h index 93ece3df87..d842274583 100644 --- a/src/soc/intel/braswell/include/soc/lpc.h +++ b/src/soc/intel/braswell/include/soc/lpc.h @@ -30,6 +30,9 @@ #define UART_CONT 0x80 #define RCBA 0xf0 +/* Memory Mapped IO in LPC bridge */ +#define SCNT 0x10 +#define SCNT_MODE (1 << 7) /* When cleared, SERIRQ is in quiet mode */ #define RID_A_STEPPING_START 1 #define RID_B_STEPPING_START 5 diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c index 0e2d5e2024..e03312386a 100644 --- a/src/soc/intel/braswell/southcluster.c +++ b/src/soc/intel/braswell/southcluster.c @@ -38,6 +38,18 @@ #include <soc/spi.h> #include <spi-generic.h> #include <stdint.h> +#include <reg_script.h> + +static const struct reg_script ops[] = { + REG_MMIO_RMW32(ILB_BASE_ADDRESS + SCNT, + ~SCNT_MODE, 0), /* put LPC SERIRQ in Quiet Mode */ + REG_SCRIPT_END +}; + +static void enable_serirq_quiet_mode(void) +{ + reg_script_run(ops); +} static inline void add_mmio_resource(device_t dev, int i, unsigned long addr, unsigned long size) @@ -503,6 +515,7 @@ static void finalize_chipset(void *unused) write32(spi + LVSCC, cfg.lvscc | VCL); } spi_init(); + enable_serirq_quiet_mode(); printk(BIOS_DEBUG, "Finalizing SMM.\n"); outb(APM_CNT_FINALIZE, APM_CNT); |