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-rw-r--r--src/soc/imgtec/pistachio/Kconfig1
-rw-r--r--src/soc/imgtec/pistachio/Makefile.inc1
-rw-r--r--src/soc/imgtec/pistachio/reset.c25
3 files changed, 27 insertions, 0 deletions
diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig
index e26130b8a7..2e28174329 100644
--- a/src/soc/imgtec/pistachio/Kconfig
+++ b/src/soc/imgtec/pistachio/Kconfig
@@ -21,6 +21,7 @@ config CPU_IMGTEC_PISTACHIO
select HAVE_UART_SPECIAL
select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
+ select HAVE_HARD_RESET
bool
if CPU_IMGTEC_PISTACHIO
diff --git a/src/soc/imgtec/pistachio/Makefile.inc b/src/soc/imgtec/pistachio/Makefile.inc
index 1a5e2af600..78e77892fc 100644
--- a/src/soc/imgtec/pistachio/Makefile.inc
+++ b/src/soc/imgtec/pistachio/Makefile.inc
@@ -33,6 +33,7 @@ bootblock-y += monotonic_timer.c
ramstage-y += cbmem.c
ramstage-y += monotonic_timer.c
ramstage-y += soc.c
+ramstage-y += reset.c
romstage-y += cbmem.c
romstage-y += ddr2_init.c
diff --git a/src/soc/imgtec/pistachio/reset.c b/src/soc/imgtec/pistachio/reset.c
new file mode 100644
index 0000000000..7bf4d03306
--- /dev/null
+++ b/src/soc/imgtec/pistachio/reset.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <reset.h>
+
+void hard_reset(void)
+{
+ printk(BIOS_EMERG, "reset failed!\n");
+ /* TBD */
+ for (;;)
+ ;
+}