diff options
-rw-r--r-- | src/soc/intel/tigerlake/chip.h | 6 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/romstage/fsp_params_jsl.c | 12 |
2 files changed, 17 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index d2ea0ddd2f..d23148aac8 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -193,6 +193,12 @@ struct soc_intel_tigerlake_config { */ uint8_t SerialIoGSpiCsState[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX]; + /* + * TraceHubMode config + * 0: Disable, 1: Target Debugger Mode, 2: Host Debugger Mode + */ + uint8_t TraceHubMode; + /* Debug interface selection */ enum { DEBUG_INTERFACE_RAM = (1 << 0), diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c index 9c70f2ece1..a5c4c907e2 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c @@ -69,8 +69,18 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, /* Set CPU Ratio */ m_cfg->CpuRatio = 0; + + /* Set debug interface flags */ m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ? - DEBUG_INTERFACE_UART : DEBUG_INTERFACE_TRACEHUB; + DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO; + + /* TraceHub configuration */ + dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB); + if (dev && dev->enabled && config->TraceHubMode) { + m_cfg->PcdDebugInterfaceFlags |= DEBUG_INTERFACE_TRACEHUB; + m_cfg->PchTraceHubMode = config->TraceHubMode; + m_cfg->CpuTraceHubMode = config->TraceHubMode; + } /* Change VmxEnable UPD value according to ENABLE_VMX Kconfig */ m_cfg->VmxEnable = CONFIG(ENABLE_VMX); |