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-rw-r--r--src/cpu/amd/agesa/family10/model_10_init.c20
-rw-r--r--src/cpu/amd/agesa/family12/model_12_init.c20
-rw-r--r--src/cpu/amd/agesa/family14/model_14_init.c20
-rw-r--r--src/cpu/amd/agesa/family15/model_15_init.c20
-rw-r--r--src/cpu/amd/agesa/family15tn/model_15_init.c20
-rw-r--r--src/cpu/amd/model_10xxx/model_10xxx_init.c20
-rw-r--r--src/cpu/amd/model_10xxx/processor_name.c3
-rw-r--r--src/cpu/amd/model_fxx/model_fxx_init.c20
-rw-r--r--src/cpu/amd/model_fxx/processor_name.c12
-rw-r--r--src/cpu/amd/mtrr/amd_mtrr.c2
-rw-r--r--src/cpu/x86/mtrr/earlymtrr.c2
-rw-r--r--src/include/cpu/amd/amdfam12.h3
-rw-r--r--src/include/cpu/amd/amdfam14.h3
-rw-r--r--src/include/cpu/amd/amdfam15.h3
-rw-r--r--src/include/cpu/amd/model_10xxx_msr.h3
-rw-r--r--src/include/cpu/amd/mtrr.h20
16 files changed, 24 insertions, 167 deletions
diff --git a/src/cpu/amd/agesa/family10/model_10_init.c b/src/cpu/amd/agesa/family10/model_10_init.c
index 1f098eb904..899a3c4d32 100644
--- a/src/cpu/amd/agesa/family10/model_10_init.c
+++ b/src/cpu/amd/agesa/family10/model_10_init.c
@@ -35,26 +35,6 @@
#define MCI_STATUS 0x401
-static msr_t rdmsr_amd(u32 index)
-{
- msr_t result;
- __asm__ __volatile__(
- "rdmsr"
- :"=a"(result.lo), "=d"(result.hi)
- :"c"(index), "D"(0x9c5a203a)
- );
- return result;
-}
-
-static void wrmsr_amd(u32 index, msr_t msr)
-{
- __asm__ __volatile__(
- "wrmsr"
- : /* No outputs */
- :"c"(index), "a"(msr.lo), "d"(msr.hi), "D"(0x9c5a203a)
- );
-}
-
static void model_10_init(device_t dev)
{
printk(BIOS_DEBUG, "Model 10 Init - a no-op.\n");
diff --git a/src/cpu/amd/agesa/family12/model_12_init.c b/src/cpu/amd/agesa/family12/model_12_init.c
index 3450b99f14..0dae912614 100644
--- a/src/cpu/amd/agesa/family12/model_12_init.c
+++ b/src/cpu/amd/agesa/family12/model_12_init.c
@@ -36,26 +36,6 @@
#define MCI_STATUS 0x401
-msr_t rdmsr_amd(u32 index)
-{
- msr_t result;
- __asm__ __volatile__(
- "rdmsr"
- :"=a"(result.lo), "=d"(result.hi)
- :"c"(index), "D"(0x9c5a203a)
- );
- return result;
-}
-
-void wrmsr_amd(u32 index, msr_t msr)
-{
- __asm__ __volatile__(
- "wrmsr"
- : /* No outputs */
- :"c"(index), "a"(msr.lo), "d"(msr.hi), "D"(0x9c5a203a)
- );
-}
-
static void model_12_init(device_t dev)
{
printk(BIOS_DEBUG, "Model 12 Init - a no-op.\n");
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index 277f974f35..7ae2b2405e 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -39,26 +39,6 @@
#define MCI_STATUS 0x401
-msr_t rdmsr_amd(u32 index)
-{
- msr_t result;
- __asm__ __volatile__(
- "rdmsr"
- :"=a"(result.lo), "=d"(result.hi)
- :"c"(index), "D"(0x9c5a203a)
- );
- return result;
-}
-
-void wrmsr_amd(u32 index, msr_t msr)
-{
- __asm__ __volatile__(
- "wrmsr"
- : /* No outputs */
- :"c"(index), "a"(msr.lo), "d"(msr.hi), "D"(0x9c5a203a)
- );
-}
-
static void model_14_init(device_t dev)
{
u32 i;
diff --git a/src/cpu/amd/agesa/family15/model_15_init.c b/src/cpu/amd/agesa/family15/model_15_init.c
index ba1d9a4e1f..ea7e663d03 100644
--- a/src/cpu/amd/agesa/family15/model_15_init.c
+++ b/src/cpu/amd/agesa/family15/model_15_init.c
@@ -32,26 +32,6 @@
#include <cpu/x86/mtrr.h>
#include <cpu/amd/amdfam15.h>
-msr_t rdmsr_amd(u32 index)
-{
- msr_t result;
- __asm__ __volatile__(
- "rdmsr"
- :"=a"(result.lo), "=d"(result.hi)
- :"c"(index), "D"(0x9c5a203a)
- );
- return result;
-}
-
-void wrmsr_amd(u32 index, msr_t msr)
-{
- __asm__ __volatile__(
- "wrmsr"
- : /* No outputs */
- :"c"(index), "a"(msr.lo), "d"(msr.hi), "D"(0x9c5a203a)
- );
-}
-
static void model_15_init(device_t dev)
{
printk(BIOS_DEBUG, "Model 15 Init.\n");
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index 938e9c96cd..aebc27bd41 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -37,26 +37,6 @@
#include <cpu/amd/agesa/s3_resume.h>
#endif
-msr_t rdmsr_amd(u32 index)
-{
- msr_t result;
- __asm__ __volatile__(
- "rdmsr"
- :"=a"(result.lo), "=d"(result.hi)
- :"c"(index), "D"(0x9c5a203a)
- );
- return result;
-}
-
-void wrmsr_amd(u32 index, msr_t msr)
-{
- __asm__ __volatile__(
- "wrmsr"
- : /* No outputs */
- :"c"(index), "a"(msr.lo), "d"(msr.hi), "D"(0x9c5a203a)
- );
-}
-
static void model_15_init(device_t dev)
{
printk(BIOS_DEBUG, "Model 15 Init.\n");
diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c
index 01ae319e22..c6cf64a5a4 100644
--- a/src/cpu/amd/model_10xxx/model_10xxx_init.c
+++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c
@@ -38,26 +38,6 @@
#define MCI_STATUS 0x401
-msr_t rdmsr_amd(u32 index)
-{
- msr_t result;
- __asm__ __volatile__(
- "rdmsr"
- :"=a"(result.lo), "=d"(result.hi)
- :"c"(index), "D"(0x9c5a203a)
- );
- return result;
-}
-
-void wrmsr_amd(u32 index, msr_t msr)
-{
- __asm__ __volatile__(
- "wrmsr"
- : /* No outputs */
- :"c"(index), "a"(msr.lo), "d"(msr.hi), "D"(0x9c5a203a)
- );
-}
-
static void model_10xxx_init(device_t dev)
{
u8 i;
diff --git a/src/cpu/amd/model_10xxx/processor_name.c b/src/cpu/amd/model_10xxx/processor_name.c
index 62040d9a51..b16e9ba0fd 100644
--- a/src/cpu/amd/model_10xxx/processor_name.c
+++ b/src/cpu/amd/model_10xxx/processor_name.c
@@ -29,11 +29,10 @@
#include <console/console.h>
#include <string.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/mtrr.h>
#include <cpu/cpu.h>
#include <cpu/amd/model_10xxx_rev.h>
-extern void wrmsr_amd(u32 index, msr_t msr);
-
/* The maximum length of CPU names is 48 bytes, including the final NULL byte.
* If you change these names your BIOS will _NOT_ pass the AMD validation and
* your mainboard will not be posted on the AMD Recommended Motherboard Website
diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c
index 4ad28a74a6..d053894d68 100644
--- a/src/cpu/amd/model_fxx/model_fxx_init.c
+++ b/src/cpu/amd/model_fxx/model_fxx_init.c
@@ -80,26 +80,6 @@ int is_cpu_f0_in_bsp(int nodeid)
#define MCI_STATUS 0x401
-static inline msr_t rdmsr_amd(u32 index)
-{
- msr_t result;
- __asm__ __volatile__(
- "rdmsr"
- :"=a"(result.lo), "=d"(result.hi)
- :"c"(index), "D"(0x9c5a203a)
- );
- return result;
-}
-
-static inline void wrmsr_amd(u32 index, msr_t msr)
-{
- __asm__ __volatile__(
- "wrmsr"
- : /* No outputs */
- :"c"(index), "a"(msr.lo), "d"(msr.hi), "D"(0x9c5a203a)
- );
-}
-
#define MTRR_COUNT 8
#define ZERO_CHUNK_KB 0x800UL /* 2M */
#define TOLM_KB 0x400000UL
diff --git a/src/cpu/amd/model_fxx/processor_name.c b/src/cpu/amd/model_fxx/processor_name.c
index 6f45b0f8cd..766cf92954 100644
--- a/src/cpu/amd/model_fxx/processor_name.c
+++ b/src/cpu/amd/model_fxx/processor_name.c
@@ -35,6 +35,7 @@
#include <console/console.h>
#include <string.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/mtrr.h>
#include <cpu/amd/model_fxx_rev.h>
/* The maximum length of CPU names is 48 bytes, including the final NULL byte.
@@ -100,17 +101,6 @@ static const char *processor_names[]={
};
#endif
-/* wrmsr_amd() is from yhlu's changes to model_fxx_init.c */
-
-static inline void wrmsr_amd(unsigned index, msr_t msr)
-{
- __asm__ __volatile__ (
- "wrmsr"
- : /* No outputs */
- : "c" (index), "a" (msr.lo), "d" (msr.hi), "D" (0x9c5a203a)
- );
-}
-
int init_processor_name(void)
{
#if !CONFIG_K8_REV_F_SUPPORT
diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c
index b804d493a6..2f3e6e340f 100644
--- a/src/cpu/amd/mtrr/amd_mtrr.c
+++ b/src/cpu/amd/mtrr/amd_mtrr.c
@@ -2,9 +2,9 @@
#include <device/device.h>
#include <arch/cpu.h>
#include <cpu/x86/mtrr.h>
+#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/msr.h>
/* These will likely move to some device node or cbmem. */
static uint64_t amd_topmem = 0;
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c
index 593f0664d7..55dbd2f4a4 100644
--- a/src/cpu/x86/mtrr/earlymtrr.c
+++ b/src/cpu/x86/mtrr/earlymtrr.c
@@ -2,8 +2,8 @@
#define EARLYMTRR_C
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
-#include <cpu/amd/mtrr.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/mtrr.h>
static void set_var_mtrr(
unsigned reg, unsigned base, unsigned size, unsigned type)
diff --git a/src/include/cpu/amd/amdfam12.h b/src/include/cpu/amd/amdfam12.h
index c8d8fcf15f..9ad84bd4ee 100644
--- a/src/include/cpu/amd/amdfam12.h
+++ b/src/include/cpu/amd/amdfam12.h
@@ -33,9 +33,6 @@
#define CPU_ID_FEATURES_MSR 0xC0011004
#define CPU_ID_EXT_FEATURES_MSR 0xC0011005
-msr_t rdmsr_amd(u32 index);
-void wrmsr_amd(u32 index, msr_t msr);
-
//#if defined(__GNUC__)
//// it can be used to get unitid and coreid it running only
//struct node_core_id get_node_core_id(u32 nb_cfg_54);
diff --git a/src/include/cpu/amd/amdfam14.h b/src/include/cpu/amd/amdfam14.h
index 16581e3204..c39019b01d 100644
--- a/src/include/cpu/amd/amdfam14.h
+++ b/src/include/cpu/amd/amdfam14.h
@@ -33,9 +33,6 @@
#define CPU_ID_FEATURES_MSR 0xC0011004
#define CPU_ID_EXT_FEATURES_MSR 0xC0011005
-msr_t rdmsr_amd(u32 index);
-void wrmsr_amd(u32 index, msr_t msr);
-
#if defined(__PRE_RAM__)
void wait_all_core0_started(void);
void wait_all_other_cores_started(u32 bsp_apicid);
diff --git a/src/include/cpu/amd/amdfam15.h b/src/include/cpu/amd/amdfam15.h
index 01da63161f..0c2cf7bde7 100644
--- a/src/include/cpu/amd/amdfam15.h
+++ b/src/include/cpu/amd/amdfam15.h
@@ -35,9 +35,6 @@
#define CPU_ID_FEATURES_MSR 0xC0011004
#define CPU_ID_EXT_FEATURES_MSR 0xC0011005
-msr_t rdmsr_amd(u32 index);
-void wrmsr_amd(u32 index, msr_t msr);
-
#if defined(__PRE_RAM__)
void wait_all_core0_started(void);
void wait_all_other_cores_started(u32 bsp_apicid);
diff --git a/src/include/cpu/amd/model_10xxx_msr.h b/src/include/cpu/amd/model_10xxx_msr.h
index 7d630798e7..6678a4f6f3 100644
--- a/src/include/cpu/amd/model_10xxx_msr.h
+++ b/src/include/cpu/amd/model_10xxx_msr.h
@@ -39,7 +39,4 @@
#define LOGICAL_CPUS_NUM_MSR 0xC001100d
#define CPU_ID_EXT_FEATURES_MSR 0xC0011005
-msr_t rdmsr_amd(u32 index);
-void wrmsr_amd(u32 index, msr_t msr);
-
#endif /* CPU_AMD_MODEL_10XXX_MSR_H */
diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h
index aa904e6a25..a9e672b48b 100644
--- a/src/include/cpu/amd/mtrr.h
+++ b/src/include/cpu/amd/mtrr.h
@@ -40,6 +40,26 @@
#if !defined(__PRE_RAM__) && !defined(__ASSEMBLER__)
void amd_setup_mtrrs(void);
+static inline __attribute__((always_inline)) msr_t rdmsr_amd(unsigned index)
+{
+ msr_t result;
+ __asm__ __volatile__ (
+ "rdmsr"
+ : "=a" (result.lo), "=d" (result.hi)
+ : "c"(index), "D"(0x9c5a203a)
+ );
+ return result;
+}
+
+static inline __attribute__((always_inline)) void wrmsr_amd(unsigned index, msr_t msr)
+{
+ __asm__ __volatile__ (
+ "wrmsr"
+ : /* No outputs */
+ : "c" (index), "a" (msr.lo), "d" (msr.hi), "D" (0x9c5a203a)
+ );
+}
+
/* To distribute topmem MSRs to APs. */
void setup_bsp_ramtop(void);
uint64_t bsp_topmem(void);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 21:23:19 +0000