diff options
3 files changed, 20 insertions, 3 deletions
diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c index 5ec5c25029..32f8356521 100644 --- a/src/mainboard/google/kahlee/romstage.c +++ b/src/mainboard/google/kahlee/romstage.c @@ -15,6 +15,7 @@ #include <amdblocks/dimm_spd.h> #include <baseboard/variants.h> +#include <soc/gpio.h> #include <soc/romstage.h> int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len) @@ -29,5 +30,11 @@ void __weak variant_romstage_entry(int s3_resume) void mainboard_romstage_entry(int s3_resume) { + size_t num_gpios; + const struct soc_amd_gpio *gpios; + + gpios = variant_romstage_gpio_table(&num_gpios); + sb_program_gpios(gpios, num_gpios); + variant_romstage_entry(s3_resume); } diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index 7922ea50b9..e9ae28c25b 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -77,9 +77,6 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = { /* GPIO_132 - CONFIG_STRAP4 */ PAD_GPI(GPIO_132, PULL_NONE), - /* GPIO_133 - APU_EDP_BKLTEN_L (backlight - Active LOW) */ - PAD_GPO(GPIO_133, HIGH), - /* GPIO_136 - UART_PCH_RX_DEBUG_TX */ PAD_NF(GPIO_136, UART0_RXD, PULL_NONE), @@ -93,6 +90,11 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = { PAD_GPI(GPIO_142, PULL_NONE), }; +static const struct soc_amd_gpio gpio_set_stage_rom[] = { + /* GPIO_133 - APU_EDP_BKLTEN_L (backlight - Active LOW) */ + PAD_GPO(GPIO_133, HIGH), +}; + static const struct soc_amd_gpio gpio_set_stage_ram[] = { /* GPIO_0 - EC_PCH_PWR_BTN_ODL */ PAD_NF(GPIO_0, PWR_BTN_L, PULL_UP), @@ -259,6 +261,13 @@ struct soc_amd_gpio *variant_early_gpio_table(size_t *size) } const __weak +struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size) +{ + *size = ARRAY_SIZE(gpio_set_stage_rom); + return gpio_set_stage_rom; +} + +const __weak struct soc_amd_gpio *variant_gpio_table(size_t *size) { *size = ARRAY_SIZE(gpio_set_stage_ram); diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h index 6e89105d99..da65bd87ab 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h @@ -28,6 +28,7 @@ int variant_mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len); int variant_get_xhci_oc_map(uint16_t *usb_oc_map); int variant_get_ehci_oc_map(uint16_t *usb_oc_map); const struct soc_amd_gpio *variant_early_gpio_table(size_t *size); +const struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size); const struct soc_amd_gpio *variant_gpio_table(size_t *size); void variant_romstage_entry(int s3_resume); #if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) |