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-rw-r--r--src/mainboard/jetway/j7f2/romstage.c2
-rw-r--r--src/superio/fintek/f71805f/Makefile.inc2
-rw-r--r--src/superio/fintek/f71805f/early_serial.c3
-rw-r--r--src/superio/fintek/f71805f/f71805f.h4
4 files changed, 7 insertions, 4 deletions
diff --git a/src/mainboard/jetway/j7f2/romstage.c b/src/mainboard/jetway/j7f2/romstage.c
index 928fcef992..37c3ab4186 100644
--- a/src/mainboard/jetway/j7f2/romstage.c
+++ b/src/mainboard/jetway/j7f2/romstage.c
@@ -31,7 +31,7 @@
#include "drivers/pc80/udelay_io.c"
#include "lib/delay.c"
#include "southbridge/via/vt8237r/early_smbus.c"
-#include "superio/fintek/f71805f/early_serial.c"
+#include <superio/fintek/f71805f/f71805f.h>
#include <lib.h>
#include <spd.h>
diff --git a/src/superio/fintek/f71805f/Makefile.inc b/src/superio/fintek/f71805f/Makefile.inc
index 9ed5e6f9f8..22c01e059c 100644
--- a/src/superio/fintek/f71805f/Makefile.inc
+++ b/src/superio/fintek/f71805f/Makefile.inc
@@ -18,5 +18,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+romstage-$(CONFIG_SUPERIO_FINTEK_F71805F) += early_serial.c
ramstage-$(CONFIG_SUPERIO_FINTEK_F71805F) += superio.c
-
diff --git a/src/superio/fintek/f71805f/early_serial.c b/src/superio/fintek/f71805f/early_serial.c
index 827f870a37..b823a430e5 100644
--- a/src/superio/fintek/f71805f/early_serial.c
+++ b/src/superio/fintek/f71805f/early_serial.c
@@ -21,6 +21,7 @@
/* Pre-RAM driver for the Fintek F71805F/FG Super I/O chip. */
#include <arch/io.h>
+#include <device/pnp.h>
#include "f71805f.h"
static void pnp_enter_conf_state(device_t dev)
@@ -36,7 +37,7 @@ static void pnp_exit_conf_state(device_t dev)
outb(0xaa, port);
}
-static void f71805f_enable_serial(device_t dev, u16 iobase)
+void f71805f_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
diff --git a/src/superio/fintek/f71805f/f71805f.h b/src/superio/fintek/f71805f/f71805f.h
index 0670128da1..6aae58f299 100644
--- a/src/superio/fintek/f71805f/f71805f.h
+++ b/src/superio/fintek/f71805f/f71805f.h
@@ -38,4 +38,6 @@
#define F71805F_GPIO 0x06 /* General Purpose I/O (GPIO) */
#define F71805F_PME 0x0a /* Power Management Events (PME) */
-#endif
+void f71805f_enable_serial(device_t dev, u16 iobase);
+
+#endif /* SUPERIO_FINTEK_F71805F_F71805F_H */