summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/soc/intel/apollolake/chip.c16
-rw-r--r--src/soc/intel/apollolake/include/soc/usb.h1
2 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index afbb45cd04..a3ce48383d 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -593,6 +593,22 @@ static void glk_fsp_silicon_init_params_cb(
struct soc_intel_apollolake_config *cfg, FSP_S_CONFIG *silconfig)
{
#if IS_ENABLED(CONFIG_SOC_INTEL_GLK)
+ uint8_t port;
+
+ for (port = 0; port < APOLLOLAKE_USB2_PORT_MAX; port++) {
+ if (!cfg->usb2eye[port].Usb20OverrideEn)
+ continue;
+
+ silconfig->Usb2AfePehalfbit[port] =
+ cfg->usb2eye[port].Usb20PerPortTxPeHalf;
+ silconfig->Usb2AfePetxiset[port] =
+ cfg->usb2eye[port].Usb20PerPortPeTxiSet;
+ silconfig->Usb2AfeTxiset[port] =
+ cfg->usb2eye[port].Usb20PerPortTxiSet;
+ silconfig->Usb2AfePredeemp[port] =
+ cfg->usb2eye[port].Usb20IUsbTxEmphasisEn;
+ }
+
silconfig->Gmm = 0;
/* On Geminilake, we need to override the default FSP PCIe de-emphasis
diff --git a/src/soc/intel/apollolake/include/soc/usb.h b/src/soc/intel/apollolake/include/soc/usb.h
index 7dd9ec089a..28cad37f58 100644
--- a/src/soc/intel/apollolake/include/soc/usb.h
+++ b/src/soc/intel/apollolake/include/soc/usb.h
@@ -30,6 +30,7 @@ struct usb2_eye_per_port {
uint8_t Usb20IUsbTxEmphasisEn;
uint8_t Usb20PerPortRXISet;
uint8_t Usb20HsNpreDrvSel;
+ uint8_t Usb20OverrideEn;
};
#endif /* _SOC_APOLLOLAKE_USB_H_ */