diff options
| -rw-r--r-- | src/soc/amd/picasso/fch.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index fa99db8334..e6cd51acc0 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -115,7 +115,7 @@ static void sb_rfmux_config_override(void) } } -static void sb_init_acpi_ports(void) +static void fch_init_acpi_ports(void) { u32 reg; @@ -220,7 +220,7 @@ static void gpp_clk_setup(void) void fch_init(void *chip_info) { i2c_soc_init(); - sb_init_acpi_ports(); + fch_init_acpi_ports(); acpi_pm_gpe_add_events_print_events(); gpio_add_events(); diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 2a915965bb..2a78ff9650 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -356,7 +356,7 @@ void sb_enable(struct device *dev) printk(BIOS_DEBUG, "%s\n", __func__); } -static void sb_init_acpi_ports(void) +static void fch_init_acpi_ports(void) { u32 reg; @@ -406,7 +406,7 @@ void fch_init(void *chip_info) { struct chipset_power_state *state; - sb_init_acpi_ports(); + fch_init_acpi_ports(); state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state)); if (state) { |