diff options
| -rw-r--r-- | src/soc/amd/common/block/acpi/halt.c | 3 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/acpi.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/pmutil.c | 9 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/smihandler.c | 21 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 14 |
5 files changed, 29 insertions, 22 deletions
diff --git a/src/soc/amd/common/block/acpi/halt.c b/src/soc/amd/common/block/acpi/halt.c index 8fba38dc03..8f36efb042 100644 --- a/src/soc/amd/common/block/acpi/halt.c +++ b/src/soc/amd/common/block/acpi/halt.c @@ -19,7 +19,8 @@ void poweroff(void) { - outl((SLP_TYP_S5 << SLP_TYP_SHIFT) | SLP_EN, pm_acpi_pm_cnt_blk()); + acpi_write32(MMIO_ACPI_PM1_CNT_BLK, + (SLP_TYP_S5 << SLP_TYP_SHIFT) | SLP_EN); /* * Setting SLP_TYP_S5 in PM1 triggers SLP_SMI, which is handled by SMM diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index 645aff4531..e09812b6da 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -97,7 +97,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) fadt->s4bios_req = 0; /* Not supported */ fadt->pstate_cnt = 0; /* Not supported */ fadt->cst_cnt = 0; /* Not supported */ - outl(0x0, ACPI_PM1_CNT_BLK); /* clear SCI_EN */ + acpi_write32(MMIO_ACPI_PM1_CNT_BLK, 0); /* clear SCI_EN */ } else { fadt->smi_cmd = 0; /* disable system management mode */ fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ @@ -105,7 +105,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */ fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ - outl(0x1, ACPI_PM1_CNT_BLK); /* set SCI_EN */ + acpi_write32(MMIO_ACPI_PM1_CNT_BLK, 1); /* set SCI_EN */ } fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK; diff --git a/src/soc/amd/stoneyridge/pmutil.c b/src/soc/amd/stoneyridge/pmutil.c index 7e5e4dfe4b..d2b3ac7bed 100644 --- a/src/soc/amd/stoneyridge/pmutil.c +++ b/src/soc/amd/stoneyridge/pmutil.c @@ -27,10 +27,11 @@ int vbnv_cmos_failed(void) int vboot_platform_is_resuming(void) { - if (!(inw(pm_acpi_pm_evt_blk()) & WAK_STS)) + if (!(acpi_read16(MMIO_ACPI_PM1_STS) & WAK_STS)) return 0; - return acpi_sleep_from_pm1(inw(pm_acpi_pm_cnt_blk())) == ACPI_S3; + uint16_t pm_cnt = acpi_read16(MMIO_ACPI_PM1_CNT_BLK); + return acpi_sleep_from_pm1(pm_cnt) == ACPI_S3; } /* If vboot requests a system reset, modify the PM1 register so it will never be @@ -39,8 +40,8 @@ void vboot_platform_prepare_reboot(void) { uint16_t pm1; - pm1 = inw(pm_acpi_pm_cnt_blk()); + pm1 = acpi_read16(MMIO_ACPI_PM1_CNT_BLK); pm1 &= ~SLP_TYP; pm1 |= SLP_TYP_S5 << SLP_TYP_SHIFT; - outw(pm1, pm_acpi_pm_cnt_blk()); + acpi_write16(MMIO_ACPI_PM1_CNT_BLK, pm1); } diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c index 8985257139..a5e66a88d2 100644 --- a/src/soc/amd/stoneyridge/smihandler.c +++ b/src/soc/amd/stoneyridge/smihandler.c @@ -92,14 +92,14 @@ static void sb_apmc_smi_handler(void) switch (cmd) { case APM_CNT_ACPI_ENABLE: - reg32 = inl(ACPI_PM1_CNT_BLK); + reg32 = acpi_read32(MMIO_ACPI_PM1_CNT_BLK); reg32 |= (1 << 0); /* SCI_EN */ - outl(reg32, ACPI_PM1_CNT_BLK); + acpi_write32(MMIO_ACPI_PM1_CNT_BLK, reg32); break; case APM_CNT_ACPI_DISABLE: - reg32 = inl(ACPI_PM1_CNT_BLK); + reg32 = acpi_read32(MMIO_ACPI_PM1_CNT_BLK); reg32 &= ~(1 << 0); /* clear SCI_EN */ - outl(reg32, ACPI_PM1_CNT_BLK); + acpi_write32(MMIO_ACPI_PM1_CNT_BLK, reg32); break; case ELOG_GSMI_APM_CNT: if (IS_ENABLED(CONFIG_ELOG_GSMI)) @@ -127,7 +127,7 @@ static void sb_slp_typ_handler(void) uint8_t slp_typ, rst_ctrl; /* Figure out SLP_TYP */ - pm1cnt = inw(pm_acpi_pm_cnt_blk()); + pm1cnt = acpi_read16(MMIO_ACPI_PM1_CNT_BLK); printk(BIOS_SPEW, "SMI#: SLP = 0x%04x\n", pm1cnt); slp_typ = acpi_sleep_from_pm1(pm1cnt); @@ -182,20 +182,25 @@ static void sb_slp_typ_handler(void) * becomes a SCI. */ if (IS_ENABLED(CONFIG_ELOG_GSMI)) { - reg16 = inw(ACPI_PM1_EN) & inw(ACPI_PM1_STS); + reg16 = acpi_read16(MMIO_ACPI_PM1_EN); + reg16 &= acpi_read16(MMIO_ACPI_PM1_STS); if (reg16) elog_add_extended_event( ELOG_SLEEP_PENDING_PM1_WAKE, (u32)reg16); - reg32 = inl(ACPI_GPE0_EN) & inl(ACPI_GPE0_STS); + reg32 = acpi_read32(MMIO_ACPI_GPE0_EN); + reg32 &= acpi_read32(MMIO_ACPI_GPE0_STS); if (reg32) elog_add_extended_event( ELOG_SLEEP_PENDING_GPE0_WAKE, reg32); } /* if (IS_ENABLED(CONFIG_ELOG_GSMI)) */ - /* Reissue Pm1 write */ + /* + * An IO cycle is required to trigger the STPCLK/STPGNT + * handshake when the Pm1 write is reissued. + */ outw(pm1cnt | SLP_EN, pm_acpi_pm_cnt_blk()); hlt(); } diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 6157e5013b..fa9e48325d 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -756,8 +756,8 @@ static void sb_init_acpi_ports(void) static uint16_t reset_pm1_status(void) { - uint16_t pm1_sts = inw(ACPI_PM1_STS); - outw(pm1_sts, ACPI_PM1_STS); + uint16_t pm1_sts = acpi_read16(MMIO_ACPI_PM1_STS); + acpi_write16(MMIO_ACPI_PM1_STS, pm1_sts); return pm1_sts; } @@ -812,12 +812,12 @@ static void sb_save_sws(uint16_t pm1_status) if (sws == NULL) return; sws->pm1_sts = pm1_status; - sws->pm1_en = inw(ACPI_PM1_EN); - reg32 = inl(ACPI_GPE0_STS); - outl(ACPI_GPE0_STS, reg32); + sws->pm1_en = acpi_read16(MMIO_ACPI_PM1_EN); + reg32 = acpi_read32(MMIO_ACPI_GPE0_STS); + acpi_write32(MMIO_ACPI_GPE0_STS, reg32); sws->gpe0_sts = reg32; - sws->gpe0_en = inl(ACPI_GPE0_EN); - reg16 = inw(ACPI_PM1_CNT_BLK); + sws->gpe0_en = acpi_read32(MMIO_ACPI_GPE0_EN); + reg16 = acpi_read16(MMIO_ACPI_PM1_CNT_BLK); reg16 &= SLP_TYP; sws->wake_from = reg16 >> SLP_TYP_SHIFT; } |