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-rw-r--r--src/cpu/amd/car/cache_as_ram.inc2
-rw-r--r--src/cpu/intel/car/core2/cache_as_ram.S2
-rw-r--r--src/cpu/intel/car/p3/cache_as_ram.S2
-rw-r--r--src/cpu/intel/car/p4-netburst/cache_as_ram.S2
-rw-r--r--src/cpu/via/car/cache_as_ram.inc4
-rw-r--r--src/soc/intel/broadwell/romstage/cache_as_ram.inc2
6 files changed, 7 insertions, 7 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index 4a1cfa5585..c773bd65bc 100644
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -378,7 +378,7 @@ fam15_skip_dram_mtrr_setup:
xorl %edx, %edx
/*
* IMPORTANT: The following calculation _must_ be done at runtime. See
- * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+ * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
*/
movl $_program, %eax
andl $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
diff --git a/src/cpu/intel/car/core2/cache_as_ram.S b/src/cpu/intel/car/core2/cache_as_ram.S
index 3399510b76..f47e81240c 100644
--- a/src/cpu/intel/car/core2/cache_as_ram.S
+++ b/src/cpu/intel/car/core2/cache_as_ram.S
@@ -148,7 +148,7 @@ addrsize_set_high:
xorl %edx, %edx
/*
* IMPORTANT: The following calculation _must_ be done at runtime. See
- * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+ * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
*/
movl $_program, %eax
andl $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
diff --git a/src/cpu/intel/car/p3/cache_as_ram.S b/src/cpu/intel/car/p3/cache_as_ram.S
index 35dd164e7f..b3bf230226 100644
--- a/src/cpu/intel/car/p3/cache_as_ram.S
+++ b/src/cpu/intel/car/p3/cache_as_ram.S
@@ -137,7 +137,7 @@ addrsize_set_high:
xorl %edx, %edx
/*
* IMPORTANT: The following calculation _must_ be done at runtime. See
- * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+ * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
*/
movl $_program, %eax
andl $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
index 60423967a5..316d45288c 100644
--- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S
+++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
@@ -332,7 +332,7 @@ no_msr_11e:
xorl %edx, %edx
/*
* IMPORTANT: The following calculation _must_ be done at runtime. See
- * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+ * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
*/
movl $_program, %eax
andl $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
diff --git a/src/cpu/via/car/cache_as_ram.inc b/src/cpu/via/car/cache_as_ram.inc
index aaa672b4ae..b7803d8fde 100644
--- a/src/cpu/via/car/cache_as_ram.inc
+++ b/src/cpu/via/car/cache_as_ram.inc
@@ -114,7 +114,7 @@ clear_fixed_var_mtrr_out:
xorl %edx, %edx
/*
* IMPORTANT: The following calculation _must_ be done at runtime. See
- * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+ * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
*/
movl $_program, %eax
andl $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
@@ -205,7 +205,7 @@ clear_fixed_var_mtrr_out:
xorl %edx, %edx
/*
* IMPORTANT: The following calculation _must_ be done at runtime. See
- * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+ * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
*/
movl $_program, %eax
andl $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
diff --git a/src/soc/intel/broadwell/romstage/cache_as_ram.inc b/src/soc/intel/broadwell/romstage/cache_as_ram.inc
index fd9f829286..6d3d6dd7f6 100644
--- a/src/soc/intel/broadwell/romstage/cache_as_ram.inc
+++ b/src/soc/intel/broadwell/romstage/cache_as_ram.inc
@@ -134,7 +134,7 @@ clear_mtrrs:
xorl %edx, %edx
/*
* IMPORTANT: The following calculation _must_ be done at runtime. See
- * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+ * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
*/
movl $_program, %eax
andl $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax