diff options
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 549f403384..89eaef5b56 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -320,16 +320,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) */ params->SpiFlashCfgLockDown = 0; } - /* only replacing preexisting subsys ID defaults when non-zero */ - if (CONFIG_SUBSYSTEM_VENDOR_ID != 0) { - params->DefaultSvid = CONFIG_SUBSYSTEM_VENDOR_ID; - params->PchSubSystemVendorId = CONFIG_SUBSYSTEM_VENDOR_ID; - } - - if (CONFIG_SUBSYSTEM_DEVICE_ID != 0) { - params->DefaultSid = CONFIG_SUBSYSTEM_DEVICE_ID; - params->PchSubSystemId = CONFIG_SUBSYSTEM_DEVICE_ID; - } + /* FSP should let coreboot set subsystem IDs, which are read/write-once */ + params->DefaultSvid = 0; + params->PchSubSystemVendorId = 0; + params->DefaultSid = 0; + params->PchSubSystemId = 0; params->PchPmWolEnableOverride = config->WakeConfigWolEnableOverride; params->PchPmPcieWakeFromDeepSx = config->WakeConfigPcieWakeFromDeepSx; |