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-rw-r--r--src/mainboard/google/storm/mmu.c2
-rw-r--r--src/soc/qualcomm/ipq806x/cbmem.c17
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/soc_services.h3
3 files changed, 22 insertions, 0 deletions
diff --git a/src/mainboard/google/storm/mmu.c b/src/mainboard/google/storm/mmu.c
index 4d2e9a0123..fcea8e22ad 100644
--- a/src/mainboard/google/storm/mmu.c
+++ b/src/mainboard/google/storm/mmu.c
@@ -34,6 +34,8 @@ void setup_dram_mappings(enum dram_state dram)
mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
/* Map DMA memory */
mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
+ /* Mark cbmem backing store as ready. */
+ ipq_cbmem_backing_store_ready();
} else {
mmu_disable_range(DRAM_START, DRAM_SIZE);
/* Map DMA memory */
diff --git a/src/soc/qualcomm/ipq806x/cbmem.c b/src/soc/qualcomm/ipq806x/cbmem.c
index 7aff231be7..9674db65da 100644
--- a/src/soc/qualcomm/ipq806x/cbmem.c
+++ b/src/soc/qualcomm/ipq806x/cbmem.c
@@ -16,7 +16,24 @@
#include <cbmem.h>
#include <soc/soc_services.h>
+static int cbmem_backing_store_ready;
+
+void ipq_cbmem_backing_store_ready(void)
+{
+ cbmem_backing_store_ready = 1;
+}
+
void *cbmem_top(void)
{
+ /*
+ * In romstage, make sure that cbmem backing store is ready before
+ * returning the pointer to cbmem top. Otherwise, it could lead to
+ * issues with components that utilize cbmem in romstage
+ * (e.g. vboot_locator for loading ipq blobs before DRAM is
+ * initialized).
+ */
+ if (ENV_ROMSTAGE && (cbmem_backing_store_ready == 0))
+ return NULL;
+
return _memlayout_cbmem_top;
}
diff --git a/src/soc/qualcomm/ipq806x/include/soc/soc_services.h b/src/soc/qualcomm/ipq806x/include/soc/soc_services.h
index 7006b82871..e7a6d683e8 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/soc_services.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/soc_services.h
@@ -32,4 +32,7 @@ int tz_init_wrapper(int, int, void *);
/* Load RPM code into memory and trigger its execution. */
void start_rpm(void);
+/* Mark cbmem backing store as ready. */
+void ipq_cbmem_backing_store_ready(void);
+
#endif