diff options
| -rw-r--r-- | src/southbridge/intel/bd82x6x/bootblock.c | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c index 3a99f512c6..a3228e7e52 100644 --- a/src/southbridge/intel/bd82x6x/bootblock.c +++ b/src/southbridge/intel/bd82x6x/bootblock.c @@ -2,16 +2,9 @@ #include <arch/bootblock.h> #include <device/pci_ops.h> +#include <southbridge/intel/common/early_spi.h> #include "pch.h" -/* - * Enable Prefetching and Caching. - */ -static void enable_spi_prefetch(void) -{ - pci_update_config8(PCH_LPC_DEV, BIOS_CNTL, ~(3 << 2), 2 << 2); -} - static void enable_port80_on_lpc(void) { /* Enable port 80 POST on LPC */ @@ -40,7 +33,7 @@ static void set_spi_speed(void) void bootblock_early_southbridge_init(void) { - enable_spi_prefetch(); + enable_spi_prefetching_and_caching(); early_pch_init(); |