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-rw-r--r--src/soc/amd/stoneyridge/model_15_init.c5
-rw-r--r--src/soc/amd/stoneyridge/northbridge.c4
2 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/amd/stoneyridge/model_15_init.c b/src/soc/amd/stoneyridge/model_15_init.c
index 7dfcdb81f1..e89671821d 100644
--- a/src/soc/amd/stoneyridge/model_15_init.c
+++ b/src/soc/amd/stoneyridge/model_15_init.c
@@ -71,11 +71,6 @@ static void model_15_init(device_t dev)
/* Enable the local CPU APICs */
setup_lapic();
- /* DisableCf8ExtCfg */
- msr = rdmsr(NB_CFG_MSR);
- msr.hi &= ~(1 << (46 - 32));
- wrmsr(NB_CFG_MSR, msr);
-
/* Write protect SMM space with SMMLOCK. */
msr = rdmsr(HWCR_MSR);
msr.lo |= (1 << 0);
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 922342971c..16cda01cf2 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -44,10 +44,6 @@
#include <Porting.h>
#include <Topology.h>
-#if IS_ENABLED(CONFIG_EXT_CONF_SUPPORT)
-#error CONFIG_EXT_CONF_SUPPORT == 1 not support anymore!
-#endif
-
typedef struct dram_base_mask {
u32 base; /* [47:27] at [28:8] */
u32 mask; /* [47:27] at [28:8] and enable at bit 0 */