diff options
| -rw-r--r-- | src/soc/intel/apollolake/bootblock/bootblock.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/romstage.c | 7 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c index 7b4eaef430..f86c18ed43 100644 --- a/src/soc/intel/apollolake/bootblock/bootblock.c +++ b/src/soc/intel/apollolake/bootblock/bootblock.c @@ -21,6 +21,7 @@ #include <device/pci_ops.h> #include <intelblocks/cpulib.h> #include <intelblocks/fast_spi.h> +#include <intelblocks/lpc_lib.h> #include <intelblocks/p2sb.h> #include <intelblocks/pcr.h> #include <intelblocks/rtc.h> @@ -96,6 +97,8 @@ void bootblock_soc_early_init(void) /* Prepare UART for serial console. */ if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE)) uart_bootblock_init(); + if (CONFIG(DRIVERS_UART_8250IO)) + lpc_io_setup_comm_a_b(); if (CONFIG(TPM_ON_FAST_SPI)) tpm_enable(); diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 640208dd0f..fb8473c512 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -91,9 +91,6 @@ static void soc_early_romstage_init(void) /* Enable decoding for HPET. Needed for FSP global pointer storage */ pci_write_config8(PCH_DEV_P2SB, P2SB_HPTC, P2SB_HPTC_ADDRESS_SELECT_0 | P2SB_HPTC_ADDRESS_ENABLE); - - if (CONFIG(DRIVERS_UART_8250IO)) - lpc_io_setup_comm_a_b(); } /* Thermal throttle activation offset */ @@ -207,10 +204,10 @@ asmlinkage void car_stage_entry(void) timestamp_add_now(TS_START_ROMSTAGE); - soc_early_romstage_init(); - console_init(); + soc_early_romstage_init(); + s3wake = pmc_fill_power_state(ps) == ACPI_S3; fsp_memory_init(s3wake); |