diff options
| -rw-r--r-- | src/mainboard/ocp/wedge100s/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/romstage/romstage.c | 8 |
2 files changed, 6 insertions, 3 deletions
diff --git a/src/mainboard/ocp/wedge100s/romstage.c b/src/mainboard/ocp/wedge100s/romstage.c index 1d770366ba..9e294d978b 100644 --- a/src/mainboard/ocp/wedge100s/romstage.c +++ b/src/mainboard/ocp/wedge100s/romstage.c @@ -40,6 +40,7 @@ void early_mainboard_romstage_entry(void) */ msr_t msr = rdmsr(IA32_FEATURE_CONTROL); if (msr.lo & 1) { + console_init(); printk(BIOS_EMERG, "Detected broken platform state. Issuing full reset\n"); full_reset(); } diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c index 003ae2270c..8ddca26be5 100644 --- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c +++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c @@ -68,14 +68,16 @@ void *asmlinkage main(FSP_INFO_HEADER *fsp_info_header) pci_write_config16(PCI_DEV(0x0, LPC_DEV, LPC_FUNC), LPC_EN, 0x340f); } - console_init(); - init_rtc(); - setup_gpio_io_address(); /* Call into mainboard. */ post_code(0x41); early_mainboard_romstage_entry(); + post_code(0x42); + console_init(); + init_rtc(); + setup_gpio_io_address(); + /* * Call early init to initialize memory and chipset. This function returns * to the romstage_main_continue function with a pointer to the HOB |