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-rw-r--r--src/arch/x86/include/arch/cbfs.h26
-rw-r--r--src/arch/x86/include/bootblock_common.h32
-rw-r--r--src/arch/x86/init/bootblock_normal.c1
-rw-r--r--src/arch/x86/init/bootblock_simple.c1
4 files changed, 34 insertions, 26 deletions
diff --git a/src/arch/x86/include/arch/cbfs.h b/src/arch/x86/include/arch/cbfs.h
new file mode 100644
index 0000000000..635ff10fd6
--- /dev/null
+++ b/src/arch/x86/include/arch/cbfs.h
@@ -0,0 +1,26 @@
+static void *walkcbfs(char *target)
+{
+ void *entry;
+ asm volatile (
+ "mov $1f, %%esp\n\t"
+ "jmp walkcbfs_asm\n\t"
+ "1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edi", "esp");
+ return entry;
+}
+
+/* just enough to support findstage. copied because the original version doesn't easily pass through romcc */
+struct cbfs_stage_restricted {
+ unsigned long compression;
+ unsigned long entry; // this is really 64bit, but properly endianized
+};
+
+static inline unsigned long findstage(char* target)
+{
+ return ((struct cbfs_stage_restricted *)walkcbfs(target))->entry;
+}
+
+static inline void call(unsigned long addr, unsigned long bist)
+{
+ asm volatile ("jmp *%0\n\t" : : "r" (addr), "a" (bist));
+}
+
diff --git a/src/arch/x86/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h
index a808cec7a5..4c4a092e0c 100644
--- a/src/arch/x86/include/bootblock_common.h
+++ b/src/arch/x86/include/bootblock_common.h
@@ -1,4 +1,3 @@
-#define __PRE_RAM__
#if CONFIG_LOGICAL_CPUS && \
(defined(CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT) || defined(CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT))
#include <cpu/x86/lapic/boot_cpu.c>
@@ -6,6 +5,11 @@
#define boot_cpu(x) 1
#endif
+#ifdef CONFIG_BOOTBLOCK_CPU_INIT
+#include CONFIG_BOOTBLOCK_CPU_INIT
+#else
+static void bootblock_cpu_init(void) { }
+#endif
#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
#else
@@ -17,31 +21,7 @@ static void bootblock_northbridge_init(void) { }
static void bootblock_southbridge_init(void) { }
#endif
-static void *walkcbfs(char *target)
-{
- void *entry;
- asm volatile (
- "mov $1f, %%esp\n\t"
- "jmp walkcbfs_asm\n\t"
- "1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edi", "esp");
- return entry;
-}
-
-/* just enough to support findstage. copied because the original version doesn't easily pass through romcc */
-struct cbfs_stage {
- unsigned long compression;
- unsigned long entry; // this is really 64bit, but properly endianized
-};
-
-static unsigned long findstage(char* target)
-{
- return ((struct cbfs_stage*)walkcbfs(target))->entry;
-}
-
-static void call(unsigned long addr, unsigned long bist)
-{
- asm volatile ("jmp *%0\n\t" : : "r" (addr), "a" (bist));
-}
+#include <arch/cbfs.h>
#if CONFIG_USE_OPTION_TABLE
#include <pc80/mc146818rtc.h>
diff --git a/src/arch/x86/init/bootblock_normal.c b/src/arch/x86/init/bootblock_normal.c
index 99551484aa..db9d0f9557 100644
--- a/src/arch/x86/init/bootblock_normal.c
+++ b/src/arch/x86/init/bootblock_normal.c
@@ -6,6 +6,7 @@ static void main(unsigned long bist)
if (boot_cpu()) {
bootblock_northbridge_init();
bootblock_southbridge_init();
+ bootblock_cpu_init();
}
#if CONFIG_USE_OPTION_TABLE
diff --git a/src/arch/x86/init/bootblock_simple.c b/src/arch/x86/init/bootblock_simple.c
index 3887b97c58..5d7c611aa7 100644
--- a/src/arch/x86/init/bootblock_simple.c
+++ b/src/arch/x86/init/bootblock_simple.c
@@ -5,6 +5,7 @@ static void main(unsigned long bist)
if (boot_cpu()) {
bootblock_northbridge_init();
bootblock_southbridge_init();
+ bootblock_cpu_init();
}
#if CONFIG_USE_OPTION_TABLE