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-rw-r--r--src/include/device/pci_ids.h2
-rw-r--r--src/soc/intel/cannonlake/bootblock/report_platform.c2
-rw-r--r--src/soc/intel/common/block/graphics/graphics.c2
3 files changed, 6 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index cdd1c623d0..5ad61e090d 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3083,6 +3083,8 @@
#define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_2 0x9B4A
#define PCI_DEVICE_ID_INTEL_CML_GT1_ULT_3 0x9B2B
#define PCI_DEVICE_ID_INTEL_CML_GT1_ULT_4 0x9B2C
+#define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_5 0x9BAA
+#define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_6 0x9BCA
#define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_3 0x9B4B
#define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_4 0x9B4C
#define PCI_DEVICE_ID_INTEL_CML_GT1_ULX_1 0x9B20
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index de2feafebf..3d46916133 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -135,6 +135,8 @@ static struct {
{ PCI_DEVICE_ID_INTEL_CML_GT1_ULT_4, "CometLake ULT GT1" },
{ PCI_DEVICE_ID_INTEL_CML_GT2_ULT_3, "CometLake ULT GT2" },
{ PCI_DEVICE_ID_INTEL_CML_GT2_ULT_4, "CometLake ULT GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_5, "CometLake ULT GT2" },
+ { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_6, "CometLake ULT GT2" },
{ PCI_DEVICE_ID_INTEL_CML_GT1_ULX_1, "CometLake ULX GT1" },
{ PCI_DEVICE_ID_INTEL_CML_GT2_ULX_1, "CometLake ULX GT2" },
{ PCI_DEVICE_ID_INTEL_CML_GT1_S_1, "CometLake S GT1" },
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index 2b4c4a74db..7aece76ca6 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -177,6 +177,8 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_CML_GT2_ULT_2,
PCI_DEVICE_ID_INTEL_CML_GT1_ULT_3,
PCI_DEVICE_ID_INTEL_CML_GT1_ULT_4,
+ PCI_DEVICE_ID_INTEL_CML_GT2_ULT_5,
+ PCI_DEVICE_ID_INTEL_CML_GT2_ULT_6,
PCI_DEVICE_ID_INTEL_CML_GT2_ULT_3,
PCI_DEVICE_ID_INTEL_CML_GT2_ULT_4,
PCI_DEVICE_ID_INTEL_CML_GT1_ULX_1,