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-rw-r--r--src/arch/x86/verstage.c4
-rw-r--r--src/soc/nvidia/tegra124/Kconfig1
-rw-r--r--src/soc/nvidia/tegra124/verstage.c4
-rw-r--r--src/vboot/Kconfig7
-rw-r--r--src/vboot/vboot_common.h5
-rw-r--r--src/vboot/verstage.c7
6 files changed, 7 insertions, 21 deletions
diff --git a/src/arch/x86/verstage.c b/src/arch/x86/verstage.c
index 7987e1ca6e..d24866bcab 100644
--- a/src/arch/x86/verstage.c
+++ b/src/arch/x86/verstage.c
@@ -14,10 +14,10 @@
*/
#include <arch/cpu.h>
-#include <vendorcode/google/chromeos/chromeos.h>
+#include <main_decl.h>
/* Provide an entry point for verstage when it's a separate stage. */
asmlinkage void car_stage_entry(void)
{
- verstage();
+ main();
}
diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig
index 227efca3fe..fdbbc7fc6c 100644
--- a/src/soc/nvidia/tegra124/Kconfig
+++ b/src/soc/nvidia/tegra124/Kconfig
@@ -20,7 +20,6 @@ config CHROMEOS
select VBOOT_OPROM_MATTERS
select VBOOT_STARTS_IN_BOOTBLOCK
select SEPARATE_VERSTAGE
- select CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL
config TEGRA124_MODEL_TD570D
bool "TD570D"
diff --git a/src/soc/nvidia/tegra124/verstage.c b/src/soc/nvidia/tegra124/verstage.c
index 9eee0646f9..526f14e066 100644
--- a/src/soc/nvidia/tegra124/verstage.c
+++ b/src/soc/nvidia/tegra124/verstage.c
@@ -45,9 +45,9 @@ void verstage_mainboard_init(void)
early_mainboard_init();
}
-void main(void)
+void stage_entry(void)
{
asm volatile ("bl arm_init_caches"
: : : "r0", "r1", "r2", "r3", "r4", "r5", "ip");
- verstage();
+ main();
}
diff --git a/src/vboot/Kconfig b/src/vboot/Kconfig
index e67c108d4a..2b6cde1c19 100644
--- a/src/vboot/Kconfig
+++ b/src/vboot/Kconfig
@@ -95,13 +95,6 @@ config RETURN_FROM_VERSTAGE
reused by the succeeding stage. This is useful if a RAM space is too
small to fit both the verstage and the succeeding stage.
-config CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL
- bool "The chipset provides the main() entry point for verstage"
- default n
- depends on SEPARATE_VERSTAGE
- help
- The chipset code provides their own main() entry point.
-
config VBOOT_DYNAMIC_WORK_BUFFER
bool "Vboot's work buffer is dynamically allocated."
default y if ARCH_ROMSTAGE_X86_32 && !SEPARATE_VERSTAGE
diff --git a/src/vboot/vboot_common.h b/src/vboot/vboot_common.h
index 956b54c196..aa01f28944 100644
--- a/src/vboot/vboot_common.h
+++ b/src/vboot/vboot_common.h
@@ -97,11 +97,10 @@ int vboot_platform_is_resuming(void);
/* ============================= VERSTAGE ================================== */
/*
- * Main logic for verified boot. verstage() is the stage entry point
- * while the verstage_main() is just the core logic.
+ * Main logic for verified boot. verstage_main() is just the core vboot logic.
+ * If the verstage is a separate stage, it should be entered via main().
*/
void verstage_main(void);
-void verstage(void);
void verstage_mainboard_init(void);
/* Check boot modes */
diff --git a/src/vboot/verstage.c b/src/vboot/verstage.c
index 0ec9ca6d27..64fadc736e 100644
--- a/src/vboot/verstage.c
+++ b/src/vboot/verstage.c
@@ -24,7 +24,7 @@ void __attribute__((weak)) verstage_mainboard_init(void)
/* Default empty implementation. */
}
-void verstage(void)
+void main(void)
{
console_init();
exception_init();
@@ -37,8 +37,3 @@ void verstage(void)
hlt();
}
}
-
-#if !IS_ENABLED(CONFIG_CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL)
-/* This is for boards that rely on main() for an entry point of a stage. */
-void main(void) __attribute__((alias ("verstage")));
-#endif