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-rw-r--r--src/arch/arm/armv4/bootblock_simple.c5
-rw-r--r--src/arch/arm/armv7/Makefile.inc2
-rw-r--r--src/arch/arm/armv7/bootblock_simple.c2
-rw-r--r--src/arch/arm/include/armv4/arch/exception.h35
-rw-r--r--src/arch/arm/include/armv7/arch/exception.h (renamed from src/arch/arm/include/arch/exception.h)0
-rw-r--r--src/arch/x86/include/arch/exception.h35
-rw-r--r--src/lib/hardwaremain.c2
-rw-r--r--src/mainboard/google/nyan/romstage.c3
-rw-r--r--src/mainboard/google/pit/mainboard.c5
-rw-r--r--src/mainboard/google/pit/romstage.c2
-rw-r--r--src/mainboard/google/snow/mainboard.c5
-rw-r--r--src/mainboard/google/snow/romstage.c2
-rw-r--r--src/soc/nvidia/tegra124/bootblock.c5
13 files changed, 89 insertions, 14 deletions
diff --git a/src/arch/arm/armv4/bootblock_simple.c b/src/arch/arm/armv4/bootblock_simple.c
index 9917dbb5aa..80401b3951 100644
--- a/src/arch/arm/armv4/bootblock_simple.c
+++ b/src/arch/arm/armv4/bootblock_simple.c
@@ -19,6 +19,7 @@
* MA 02110-1301 USA
*/
+#include <arch/exception.h>
#include <arch/hlt.h>
#include <arch/stages.h>
#include <bootblock_common.h>
@@ -33,8 +34,10 @@ void main(void)
bootblock_cpu_init();
bootblock_mainboard_init();
- if (CONFIG_BOOTBLOCK_CONSOLE)
+ if (CONFIG_BOOTBLOCK_CONSOLE) {
console_init();
+ exception_init();
+ }
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc
index 2eb1af01cf..2cc42bb63f 100644
--- a/src/arch/arm/armv7/Makefile.inc
+++ b/src/arch/arm/armv7/Makefile.inc
@@ -34,6 +34,8 @@ bootblock-$(CONFIG_BOOTBLOCK_SIMPLE) += bootblock_simple.c
endif
bootblock-y += cache.c
+bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c
+bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception_asm.S
bootblock-y += mmu.c
CFLAGS_bootblock += $(armv7_flags)
diff --git a/src/arch/arm/armv7/bootblock_simple.c b/src/arch/arm/armv7/bootblock_simple.c
index f447034029..5cd59704d2 100644
--- a/src/arch/arm/armv7/bootblock_simple.c
+++ b/src/arch/arm/armv7/bootblock_simple.c
@@ -20,6 +20,7 @@
*/
#include <arch/cache.h>
+#include <arch/exception.h>
#include <arch/hlt.h>
#include <arch/stages.h>
#include <bootblock_common.h>
@@ -54,6 +55,7 @@ void main(void)
#if CONFIG_BOOTBLOCK_CONSOLE
console_init();
+ exception_init();
#endif
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
diff --git a/src/arch/arm/include/armv4/arch/exception.h b/src/arch/arm/include/armv4/arch/exception.h
new file mode 100644
index 0000000000..a426c52aca
--- /dev/null
+++ b/src/arch/arm/include/armv4/arch/exception.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _ARCH_EXCEPTION_H
+#define _ARCH_EXCEPTION_H
+
+static void exception_init(void) { /* not implemented */ }
+
+#endif
diff --git a/src/arch/arm/include/arch/exception.h b/src/arch/arm/include/armv7/arch/exception.h
index 57076bd57b..57076bd57b 100644
--- a/src/arch/arm/include/arch/exception.h
+++ b/src/arch/arm/include/armv7/arch/exception.h
diff --git a/src/arch/x86/include/arch/exception.h b/src/arch/x86/include/arch/exception.h
new file mode 100644
index 0000000000..a426c52aca
--- /dev/null
+++ b/src/arch/x86/include/arch/exception.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _ARCH_EXCEPTION_H
+#define _ARCH_EXCEPTION_H
+
+static void exception_init(void) { /* not implemented */ }
+
+#endif
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c
index 277d9b72ba..9038f57987 100644
--- a/src/lib/hardwaremain.c
+++ b/src/lib/hardwaremain.c
@@ -22,6 +22,7 @@
* C Bootstrap code for the coreboot
*/
+#include <arch/exception.h>
#include <bootstate.h>
#include <console/console.h>
#include <console/post_codes.h>
@@ -469,6 +470,7 @@ void main(void)
acpi_is_wakeup();
#endif
+ exception_init();
threads_initialize();
/* Schedule the static boot state entries. */
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index e7895566f9..ea40388823 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -95,6 +95,7 @@ void main(void)
configure_l2actlr();
console_init();
+ exception_init();
mmu_init();
mmu_config_range(0, DRAM_START, DCACHE_OFF);
@@ -106,8 +107,6 @@ void main(void)
dcache_invalidate_all();
dcache_mmu_enable();
- exception_init();
-
/* For quality of the user experience, it's important to get
* the video going ASAP. Because there are long delays in some
* of the powerup steps, we do some very early setup here in
diff --git a/src/mainboard/google/pit/mainboard.c b/src/mainboard/google/pit/mainboard.c
index c0650d8542..c07db7b85f 100644
--- a/src/mainboard/google/pit/mainboard.c
+++ b/src/mainboard/google/pit/mainboard.c
@@ -27,7 +27,6 @@
#include <vbe.h>
#include <boot/coreboot_tables.h>
#include <arch/cache.h>
-#include <arch/exception.h>
#include <soc/samsung/exynos5420/tmu.h>
#include <soc/samsung/exynos5420/clk.h>
#include <soc/samsung/exynos5420/cpu.h>
@@ -472,10 +471,6 @@ static void mainboard_enable(device_t dev)
mmu_config_range(DMA_START >> 20, DMA_SIZE >> 20, DCACHE_OFF);
tlb_invalidate_all();
- /* this is going to move, but we must have it now and we're
- * not sure where */
- exception_init();
-
const unsigned epll_hz = 192000000;
const unsigned sample_rate = 48000;
const unsigned lr_frame_size = 256;
diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c
index 1393ba8a8a..16dc997e75 100644
--- a/src/mainboard/google/pit/romstage.c
+++ b/src/mainboard/google/pit/romstage.c
@@ -25,6 +25,7 @@
#include <cbmem.h>
#include <arch/cache.h>
+#include <arch/exception.h>
#include <soc/samsung/exynos5420/i2c.h>
#include <soc/samsung/exynos5420/clk.h>
#include <soc/samsung/exynos5420/cpu.h>
@@ -242,6 +243,7 @@ void main(void)
exynos_pinmux_uart3();
console_init();
+ exception_init();
if (power_init_failed)
die("Failed to intialize power.\n");
diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c
index 99a4e30a79..0b6cf4ae83 100644
--- a/src/mainboard/google/snow/mainboard.c
+++ b/src/mainboard/google/snow/mainboard.c
@@ -27,7 +27,6 @@
#include <vbe.h>
#include <boot/coreboot_tables.h>
#include <arch/cache.h>
-#include <arch/exception.h>
#include <soc/samsung/exynos5250/tmu.h>
#include <soc/samsung/exynos5250/clk.h>
#include <soc/samsung/exynos5250/gpio.h>
@@ -338,10 +337,6 @@ static void mainboard_enable(device_t dev)
dcache_invalidate_all();
dcache_mmu_enable();
- /* this is going to move, but we must have it now and we're
- * not sure where */
- exception_init();
-
const unsigned epll_hz = 192000000;
const unsigned sample_rate = 48000;
const unsigned lr_frame_size = 256;
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index ac469ba41b..9b35c4a6d4 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -24,6 +24,7 @@
#include <cbmem.h>
#include <arch/cache.h>
+#include <arch/exception.h>
#include <soc/samsung/exynos5250/i2c.h>
#include <soc/samsung/exynos5250/clk.h>
#include <soc/samsung/exynos5250/cpu.h>
@@ -151,6 +152,7 @@ void main(void)
mem = setup_clock();
console_init();
+ exception_init();
setup_power(is_resume);
setup_memory(mem, is_resume);
diff --git a/src/soc/nvidia/tegra124/bootblock.c b/src/soc/nvidia/tegra124/bootblock.c
index dbdcfa5360..0e10a2b227 100644
--- a/src/soc/nvidia/tegra124/bootblock.c
+++ b/src/soc/nvidia/tegra124/bootblock.c
@@ -17,6 +17,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <arch/exception.h>
#include <arch/hlt.h>
#include <bootblock_common.h>
#include <cbfs.h>
@@ -47,8 +48,10 @@ void main(void)
pinmux_set_config(PINMUX_UART2_RTS_N_INDEX,
PINMUX_UART2_RTS_N_FUNC_UB3);
- if (CONFIG_BOOTBLOCK_CONSOLE)
+ if (CONFIG_BOOTBLOCK_CONSOLE) {
console_init();
+ exception_init();
+ }
clock_init();
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-10 12:04:20 +0000