diff options
| -rw-r--r-- | src/northbridge/intel/sandybridge/Kconfig | 9 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/Makefile.inc | 12 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 17 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_mrc.c | 22 |
4 files changed, 26 insertions, 34 deletions
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 043e8dee79..36cf940350 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -16,7 +16,7 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE bool - select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE + select CACHE_MRC_SETTINGS select CPU_INTEL_MODEL_206AX select HAVE_DEBUG_RAM_SETUP select INTEL_GMA_ACPI @@ -24,7 +24,7 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE config NORTHBRIDGE_INTEL_IVYBRIDGE bool - select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE + select CACHE_MRC_SETTINGS select CPU_INTEL_MODEL_306AX select HAVE_DEBUG_RAM_SETUP select INTEL_GMA_ACPI @@ -88,11 +88,6 @@ config IF_NATIVE_VGA_INIT select HAVE_LINEAR_FRAMEBUFFER select HAVE_VGA_TEXT_FRAMEBUFFER -config MRC_CACHE_SIZE - hex - depends on !CHROMEOS - default 0x10000 - config BOOTBLOCK_NORTHBRIDGE_INIT string default "northbridge/intel/sandybridge/bootblock.c" diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index 846d31bd78..1470353edf 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -45,16 +45,4 @@ romstage-y += ../../../arch/x86/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c -ifneq ($(CONFIG_CHROMEOS),y) -$(obj)/mrc.cache: $(obj)/config.h - dd if=/dev/zero count=1 \ - bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \ - tr '\000' '\377' > $@ - -cbfs-files-y += mrc.cache -mrc.cache-file := $(obj)/mrc.cache -mrc.cache-align := 0x10000 -mrc.cache-type := mrc_cache -endif - endif diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 12384b4cae..b31f28042a 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -17,13 +17,14 @@ #include <console/console.h> #include <console/usb.h> +#include <commonlib/region.h> #include <bootmode.h> #include <string.h> #include <arch/io.h> #include <cbmem.h> #include <halt.h> #include <timestamp.h> -#include <northbridge/intel/common/mrc_cache.h> +#include <mrc_cache.h> #include <southbridge/intel/bd82x6x/me.h> #include <southbridge/intel/common/smbus.h> #include <cpu/x86/msr.h> @@ -35,6 +36,8 @@ #include "raminit_common.h" #include "sandybridge.h" +#define MRC_CACHE_VERSION 0 + /* FIXME: no ECC support. */ /* FIXME: no support for 3-channel chipsets. */ @@ -292,7 +295,8 @@ static void dram_find_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl) static void save_timings(ramctr_timing *ctrl) { /* Save the MRC S3 restore data to cbmem */ - store_current_mrc_cache(ctrl, sizeof(*ctrl)); + mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, ctrl, + sizeof(*ctrl)); } static int try_init_dram_ddr3(ramctr_timing *ctrl, int fast_boot, @@ -311,7 +315,7 @@ static void init_dram_ddr3(int mobile, int min_tck, int s3resume) ramctr_timing ctrl; int fast_boot; spd_raw_data spds[4]; - struct mrc_data_container *mrc_cache; + struct region_device rdev; ramctr_timing *ctrl_cached; struct cpuid_result cpures; int err; @@ -347,8 +351,9 @@ static void init_dram_ddr3(int mobile, int min_tck, int s3resume) early_thermal_init(); /* try to find timings in MRC cache */ - mrc_cache = find_current_mrc_cache(); - if (!mrc_cache || (mrc_cache->mrc_data_size < sizeof(ctrl))) { + int cache_not_found = mrc_cache_get_current(MRC_TRAINING_DATA, + MRC_CACHE_VERSION, &rdev); + if (cache_not_found || (region_device_sz(&rdev) < sizeof(ctrl))) { if (s3resume) { /* Failed S3 resume, reset to come up cleanly */ outb(0x6, 0xcf9); @@ -356,7 +361,7 @@ static void init_dram_ddr3(int mobile, int min_tck, int s3resume) } ctrl_cached = NULL; } else { - ctrl_cached = (ramctr_timing *)mrc_cache->mrc_data; + ctrl_cached = rdev_mmap_full(&rdev); } /* verify MRC cache for fast boot */ diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 901a083c2b..61f761e117 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -25,7 +25,7 @@ #include <ip_checksum.h> #include <pc80/mc146818rtc.h> #include <device/pci_def.h> -#include <northbridge/intel/common/mrc_cache.h> +#include <mrc_cache.h> #include <halt.h> #include <timestamp.h> #include "raminit.h" @@ -51,12 +51,16 @@ #define CMOS_OFFSET_MRC_SEED_CHK 160 #endif +#define MRC_CACHE_VERSION 0 + void save_mrc_data(struct pei_data *pei_data) { u16 c1, c2, checksum; /* Save the MRC S3 restore data to cbmem */ - store_current_mrc_cache(pei_data->mrc_output, pei_data->mrc_output_len); + mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, + pei_data->mrc_output, + pei_data->mrc_output_len); /* Save the MRC seed values to CMOS */ cmos_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed); @@ -80,7 +84,7 @@ void save_mrc_data(struct pei_data *pei_data) static void prepare_mrc_cache(struct pei_data *pei_data) { - struct mrc_data_container *mrc_cache; + struct region_device rdev; u16 c1, c2, checksum, seed_checksum; // preset just in case there is an error @@ -113,17 +117,17 @@ static void prepare_mrc_cache(struct pei_data *pei_data) return; } - if ((mrc_cache = find_current_mrc_cache()) == NULL) { + if (mrc_cache_get_current(MRC_TRAINING_DATA, MRC_CACHE_VERSION, + &rdev)) { /* error message printed in find_current_mrc_cache */ return; } - pei_data->mrc_input = mrc_cache->mrc_data; - pei_data->mrc_input_len = mrc_cache->mrc_data_size; + pei_data->mrc_input = rdev_mmap_full(&rdev); + pei_data->mrc_input_len = region_device_sz(&rdev); - printk(BIOS_DEBUG, "%s: at %p, size %x checksum %04x\n", - __func__, pei_data->mrc_input, - pei_data->mrc_input_len, mrc_cache->mrc_checksum); + printk(BIOS_DEBUG, "%s: at %p, size %x\n", + __func__, pei_data->mrc_input, pei_data->mrc_input_len); } static const char* ecc_decoder[] = { |