diff options
| -rw-r--r-- | src/cpu/intel/haswell/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/intel/model_2065x/Kconfig | 5 | ||||
| -rw-r--r-- | src/cpu/intel/model_206ax/Kconfig | 5 | ||||
| -rw-r--r-- | src/cpu/intel/socket_FCBGA559/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/Kconfig | 1 |
5 files changed, 5 insertions, 8 deletions
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 3fd8bb484a..5936953b52 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -23,6 +23,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select PARALLEL_MP select CPU_INTEL_COMMON + select NO_FIXED_XIP_ROM_SIZE config SMM_TSEG_SIZE hex diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 9481917ff8..ba2b7de74d 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -19,6 +19,7 @@ config CPU_SPECIFIC_OPTIONS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select CPU_INTEL_COMMON + select NO_FIXED_XIP_ROM_SIZE config BOOTBLOCK_CPU_INIT string @@ -28,8 +29,4 @@ config SMM_TSEG_SIZE hex default 0x800000 -config XIP_ROM_SIZE - hex - default 0x20000 - endif diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 7f73da9ab4..f045e9aac5 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -25,15 +25,12 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_COMMON select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select PARALLEL_MP + select NO_FIXED_XIP_ROM_SIZE config BOOTBLOCK_CPU_INIT string default "cpu/intel/model_206ax/bootblock.c" -config XIP_ROM_SIZE - hex - default 0x20000 if USE_NATIVE_RAMINIT - config SMM_TSEG_SIZE hex default 0x800000 diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index 6566a01cf8..b1b310d3cc 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -11,6 +11,7 @@ config SOCKET_SPECIFIC_OPTIONS select MMX select SSE select CPU_HAS_L2_ENABLE_MSR + select NO_FIXED_XIP_ROM_SIZE config DCACHE_RAM_BASE hex diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 5f503da340..25984f14e2 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -43,6 +43,7 @@ config CPU_SPECIFIC_OPTIONS select POSTCAR_CONSOLE select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE + select NO_FIXED_XIP_ROM_SIZE config PCIEXP_ASPM bool |