3 files changed, 0 insertions, 23 deletions
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index 0022b3a6ea..6e826b863c 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -291,9 +291,3 @@ void apollolake_init_cpus(struct device *dev)
 		CONFIG(BOOT_DEVICE_SPI_FLASH))
 		fast_spi_cache_bios_region();
 }
-
-void cpu_lock_sgx_memory(void)
-{
-	/* Do nothing because MCHECK while loading microcode and enabling
-	 * IA untrusted mode takes care of necessary locking */
-}
diff --git a/src/soc/intel/common/block/include/intelblocks/sgx.h b/src/soc/intel/common/block/include/intelblocks/sgx.h
index 693dd204e0..36634d3fa1 100644
--- a/src/soc/intel/common/block/include/intelblocks/sgx.h
+++ b/src/soc/intel/common/block/include/intelblocks/sgx.h
@@ -19,12 +19,6 @@
 #include <soc/nvs.h>
 
 /*
- * Lock SGX memory.
- * CPU specific code needs to provide the implementation.
- */
-void cpu_lock_sgx_memory(void);
-
-/*
  * Configure core PRMRR.
  * PRMRR needs to configured first on all cores and then
  * call sgx_configure() for all cores to init SGX.
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 3ac14514bb..bfed528a06 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -575,14 +575,3 @@ int soc_skip_ucode_update(u32 current_patch_id, u32 new_patch_id)
 		return (msr1.lo & PRMRR_SUPPORTED) &&
 			(current_patch_id == new_patch_id - 1);
 }
-
-void cpu_lock_sgx_memory(void)
-{
-	msr_t msr;
-
-	msr = rdmsr(MSR_LT_LOCK_MEMORY);
-	if ((msr.lo & 1) == 0) {
-		msr.lo |= 1; /* Lock it */
-		wrmsr(MSR_LT_LOCK_MEMORY, msr);
-	}
-}