diff options
44 files changed, 164 insertions, 164 deletions
diff --git a/src/Kconfig b/src/Kconfig index f531f070f7..df4e3202a1 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -56,14 +56,14 @@ config COMMON_CBFS_SPI_WRAPPER Use common wrapper to interface CBFS to SPI bootrom. config MULTIPLE_CBFS_INSTANCES - bool "Multiple CBFS instances in the bootrom" - default n - depends on !ARCH_X86 - help - Account for the firmware image containing more than one CBFS - instance. Locations of instances are known at build time and are - communicated between coreboot stages to make sure the next stage is - loaded from the appropriate instance. + bool "Multiple CBFS instances in the bootrom" + default n + depends on !ARCH_X86 + help + Account for the firmware image containing more than one CBFS + instance. Locations of instances are known at build time and are + communicated between coreboot stages to make sure the next stage is + loaded from the appropriate instance. choice prompt "Compiler to use" @@ -317,8 +317,8 @@ source "src/arch/*/Kconfig" source "src/vendorcode/*/Kconfig" config SYSTEM_TYPE_LAPTOP - default n - bool + default n + bool menu "Chipset" @@ -578,7 +578,7 @@ config MAINBOARD_SERIAL_NUMBER string "SMBIOS Serial Number" depends on GENERATE_SMBIOS_TABLES default "123456789" - help + help The Serial Number to store in SMBIOS structures. config MAINBOARD_VERSION diff --git a/src/cpu/amd/agesa/family10/Kconfig b/src/cpu/amd/agesa/family10/Kconfig index ec8521ce5e..f5b77ef373 100644 --- a/src/cpu/amd/agesa/family10/Kconfig +++ b/src/cpu/amd/agesa/family10/Kconfig @@ -42,11 +42,11 @@ config XIP_ROM_SIZE default 0x80000 config REDIRECT_IDS_HDT_CONSOLE_TO_SERIAL - bool "Redirect AGESA IDS_HDT_CONSOLE to serial console" - default n - help - This Option allows you to redirect the AMD AGESA IDS_HDT_CONSOLE debug information to the serial console. + bool "Redirect AGESA IDS_HDT_CONSOLE to serial console" + default n + help + This Option allows you to redirect the AMD AGESA IDS_HDT_CONSOLE debug information to the serial console. - Warning: Only enable this option when debuging or tracing AMD AGESA code. + Warning: Only enable this option when debuging or tracing AMD AGESA code. endif #CPU_AMD_AGESA_FAMILY10 diff --git a/src/cpu/amd/agesa/family15/Kconfig b/src/cpu/amd/agesa/family15/Kconfig index 7fe7d195f8..b292b90827 100644 --- a/src/cpu/amd/agesa/family15/Kconfig +++ b/src/cpu/amd/agesa/family15/Kconfig @@ -63,11 +63,11 @@ config XIP_ROM_SIZE default 0x80000 config REDIRECT_IDS_HDT_CONSOLE_TO_SERIAL - bool "Redirect AGESA IDS_HDT_CONSOLE to serial console" - default n - help - This Option allows you to redirect the AMD AGESA IDS_HDT_CONSOLE debug information to the serial console. + bool "Redirect AGESA IDS_HDT_CONSOLE to serial console" + default n + help + This Option allows you to redirect the AMD AGESA IDS_HDT_CONSOLE debug information to the serial console. - Warning: Only enable this option when debuging or tracing AMD AGESA code. + Warning: Only enable this option when debuging or tracing AMD AGESA code. endif #CPU_AMD_AGESA_FAMILY15 diff --git a/src/cpu/amd/socket_S1G1/Kconfig b/src/cpu/amd/socket_S1G1/Kconfig index e714200347..f88f64a9cd 100644 --- a/src/cpu/amd/socket_S1G1/Kconfig +++ b/src/cpu/amd/socket_S1G1/Kconfig @@ -1,5 +1,5 @@ config CPU_AMD_SOCKET_S1G1 - bool + bool if CPU_AMD_SOCKET_S1G1 diff --git a/src/cpu/intel/socket_LGA771/Kconfig b/src/cpu/intel/socket_LGA771/Kconfig index 62bd17b1fe..1df55e61c3 100644 --- a/src/cpu/intel/socket_LGA771/Kconfig +++ b/src/cpu/intel/socket_LGA771/Kconfig @@ -1,6 +1,6 @@ config CPU_INTEL_SOCKET_LGA771 bool - select CPU_INTEL_MODEL_6FX + select CPU_INTEL_MODEL_6FX select SSE2 select MMX select AP_IN_SIPI_WAIT diff --git a/src/drivers/intel/i210/Kconfig b/src/drivers/intel/i210/Kconfig index 0191169a0d..264cca8c13 100644 --- a/src/drivers/intel/i210/Kconfig +++ b/src/drivers/intel/i210/Kconfig @@ -1,3 +1,3 @@ config DRIVER_INTEL_I210 - bool - default n + bool + default n diff --git a/src/drivers/ipmi/Kconfig b/src/drivers/ipmi/Kconfig index 55c85ea459..5851438714 100644 --- a/src/drivers/ipmi/Kconfig +++ b/src/drivers/ipmi/Kconfig @@ -1,3 +1,3 @@ config IPMI_KCS - bool - default n + bool + default n diff --git a/src/drivers/lenovo/Kconfig b/src/drivers/lenovo/Kconfig index 30bacb90ea..f20f3b2229 100644 --- a/src/drivers/lenovo/Kconfig +++ b/src/drivers/lenovo/Kconfig @@ -1,6 +1,6 @@ config DRIVERS_LENOVO_WACOM - bool - default n + bool + default n if DRIVERS_LENOVO_WACOM diff --git a/src/drivers/ricoh/rce822/Kconfig b/src/drivers/ricoh/rce822/Kconfig index 6b0c790590..ef11383150 100644 --- a/src/drivers/ricoh/rce822/Kconfig +++ b/src/drivers/ricoh/rce822/Kconfig @@ -1,3 +1,3 @@ config DRIVERS_RICOH_RCE822 - bool - default n + bool + default n diff --git a/src/mainboard/advansus/a785e-i/Kconfig b/src/mainboard/advansus/a785e-i/Kconfig index e76a312198..388249fc70 100644 --- a/src/mainboard/advansus/a785e-i/Kconfig +++ b/src/mainboard/advansus/a785e-i/Kconfig @@ -69,7 +69,7 @@ config IRQ_SLOT_COUNT default 11 config VGA_BIOS_ID - string - default "1002,9712" + string + default "1002,9712" endif #BOARD_ADVANSUS_A785E_I diff --git a/src/mainboard/amd/tilapia_fam10/Kconfig b/src/mainboard/amd/tilapia_fam10/Kconfig index dd46f6a263..901d6b11a9 100644 --- a/src/mainboard/amd/tilapia_fam10/Kconfig +++ b/src/mainboard/amd/tilapia_fam10/Kconfig @@ -57,12 +57,12 @@ config IRQ_SLOT_COUNT default 11 config VGA_BIOS - bool - default n + bool + default n config VGA_BIOS_ID - string - depends on VGA_BIOS - default "1002,9615" + string + depends on VGA_BIOS + default "1002,9615" endif # BOARD_AMD_TILAPIA_FAM10 diff --git a/src/mainboard/aopen/Kconfig b/src/mainboard/aopen/Kconfig index 7ea4e54b50..2208e62ec0 100644 --- a/src/mainboard/aopen/Kconfig +++ b/src/mainboard/aopen/Kconfig @@ -1,7 +1,7 @@ if VENDOR_AOPEN choice - prompt "Mainboard model" + prompt "Mainboard model" source "src/mainboard/aopen/*/Kconfig.name" diff --git a/src/mainboard/asus/m5a88-v/Kconfig b/src/mainboard/asus/m5a88-v/Kconfig index bded839ac5..143018948a 100644 --- a/src/mainboard/asus/m5a88-v/Kconfig +++ b/src/mainboard/asus/m5a88-v/Kconfig @@ -67,7 +67,7 @@ config IRQ_SLOT_COUNT default 11 config VGA_BIOS_ID - string - default "1002,9715" + string + default "1002,9715" endif #BOARD_ASUS_M5A88_V diff --git a/src/mainboard/avalue/eax-785e/Kconfig b/src/mainboard/avalue/eax-785e/Kconfig index 84f3523087..38a3aa3e37 100644 --- a/src/mainboard/avalue/eax-785e/Kconfig +++ b/src/mainboard/avalue/eax-785e/Kconfig @@ -69,7 +69,7 @@ config IRQ_SLOT_COUNT default 11 config VGA_BIOS_ID - string - default "1002,9712" + string + default "1002,9712" endif #BOARD_AVALUE_EAX_785E diff --git a/src/mainboard/dmp/vortex86ex/Kconfig b/src/mainboard/dmp/vortex86ex/Kconfig index d76799e1ac..5adb52d135 100644 --- a/src/mainboard/dmp/vortex86ex/Kconfig +++ b/src/mainboard/dmp/vortex86ex/Kconfig @@ -187,7 +187,7 @@ config IDE_COMPATIBLE_SELECTION depends on IDE_STANDARD_COMPATIBLE hex "IDE Compatible Selection" default 0x808624db - help + help IDE controller PCI vendor/device ID value setting. Higher 16-bit is vendor ID, lower 16-bit is device ID. diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig index a804fd315c..39c04c6036 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig +++ b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig @@ -17,43 +17,43 @@ config BOARD_SPECIFIC_OPTIONS select VGA select INTEL_EDID select UDELAY_TSC - select SERIRQ_CONTINUOUS_MODE + select SERIRQ_CONTINUOUS_MODE config MMCONF_BASE_ADDRESS hex default 0xf0000000 config DRAM_RESET_GATE_GPIO - int + int default 25 config USBDEBUG_HCD_INDEX - int - default 2 + int + default 2 config MAINBOARD_DIR - string - default gigabyte/ga-b75m-d3h + string + default gigabyte/ga-b75m-d3h config MAINBOARD_PART_NUMBER - string - default "GA-B75M-D3H" + string + default "GA-B75M-D3H" config IRQ_SLOT_COUNT - int - default 18 + int + default 18 config MAX_CPUS - int - default 8 + int + default 8 config VGA_BIOS_ID string default "8086,0162" config VGA_BIOS_FILE - string - default "pci8086,0162.rom" + string + default "pci8086,0162.rom" config HAVE_IFD_BIN bool @@ -64,11 +64,11 @@ config HAVE_ME_BIN default n config IFD_BIOS_SECTION - string - default "0x00600000:0x007fffff" + string + default "0x00600000:0x007fffff" config IFD_ME_SECTION - string - default "0x00001000:0x004fffff" + string + default "0x00001000:0x004fffff" endif # BOARD_GIGABYTE_GA_B75M_D3H diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig b/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig index cffc7f00f4..20db0c025a 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig +++ b/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig @@ -18,43 +18,43 @@ config BOARD_SPECIFIC_OPTIONS select VGA select INTEL_EDID select UDELAY_TSC - select SERIRQ_CONTINUOUS_MODE + select SERIRQ_CONTINUOUS_MODE config MMCONF_BASE_ADDRESS hex default 0xf8000000 config DRAM_RESET_GATE_GPIO - int + int default 25 config USBDEBUG_HCD_INDEX - int - default 2 + int + default 2 config MAINBOARD_DIR - string - default gigabyte/ga-b75m-d3v + string + default gigabyte/ga-b75m-d3v config MAINBOARD_PART_NUMBER - string - default "GA-B75M-D3V" + string + default "GA-B75M-D3V" config IRQ_SLOT_COUNT - int - default 18 + int + default 18 config MAX_CPUS - int - default 8 + int + default 8 config VGA_BIOS_ID string default "8086,0102" config VGA_BIOS_FILE - string - default "pci8086,0102.rom" + string + default "pci8086,0102.rom" config HAVE_IFD_BIN bool @@ -65,11 +65,11 @@ config HAVE_ME_BIN default n config IFD_BIOS_SECTION - string - default "0x00600000:0x007fffff" + string + default "0x00600000:0x007fffff" config IFD_ME_SECTION - string - default "0x00001000:0x004fffff" + string + default "0x00001000:0x004fffff" endif # BOARD_GIGABYTE_GA_B75M_D3V diff --git a/src/mainboard/google/urara/Kconfig b/src/mainboard/google/urara/Kconfig index e1004cde40..00a00f8499 100644 --- a/src/mainboard/google/urara/Kconfig +++ b/src/mainboard/google/urara/Kconfig @@ -28,8 +28,8 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_HAS_CHROMEOS select SPI_FLASH_WINBOND select CPU_IMGTEC_PISTACHIO - select COMMON_CBFS_SPI_WRAPPER - select MAINBOARD_HAS_BOOTBLOCK_INIT + select COMMON_CBFS_SPI_WRAPPER + select MAINBOARD_HAS_BOOTBLOCK_INIT select SPI_FLASH config MAINBOARD_DIR diff --git a/src/mainboard/google/veyron_brain/Kconfig b/src/mainboard/google/veyron_brain/Kconfig index c5ff0bbbfe..b2ee7cd6d4 100644 --- a/src/mainboard/google/veyron_brain/Kconfig +++ b/src/mainboard/google/veyron_brain/Kconfig @@ -50,8 +50,8 @@ config MAINBOARD_VENDOR default "Google" config BOOT_MEDIA_SPI_BUS - int - default 2 + int + default 2 config DRIVER_TPM_I2C_BUS hex diff --git a/src/mainboard/google/veyron_danger/Kconfig b/src/mainboard/google/veyron_danger/Kconfig index d65a6c0b7f..3986c46bfb 100644 --- a/src/mainboard/google/veyron_danger/Kconfig +++ b/src/mainboard/google/veyron_danger/Kconfig @@ -50,8 +50,8 @@ config MAINBOARD_VENDOR default "Google" config BOOT_MEDIA_SPI_BUS - int - default 2 + int + default 2 config DRIVER_TPM_I2C_BUS hex diff --git a/src/mainboard/google/veyron_jerry/Kconfig b/src/mainboard/google/veyron_jerry/Kconfig index f025829cf2..ee5f204eba 100644 --- a/src/mainboard/google/veyron_jerry/Kconfig +++ b/src/mainboard/google/veyron_jerry/Kconfig @@ -61,8 +61,8 @@ config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US default 100 config BOOT_MEDIA_SPI_BUS - int - default 2 + int + default 2 config DRIVER_TPM_I2C_BUS hex diff --git a/src/mainboard/google/veyron_mighty/Kconfig b/src/mainboard/google/veyron_mighty/Kconfig index 4cccbb516f..9f0cf9a160 100644 --- a/src/mainboard/google/veyron_mighty/Kconfig +++ b/src/mainboard/google/veyron_mighty/Kconfig @@ -61,8 +61,8 @@ config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US default 100 config BOOT_MEDIA_SPI_BUS - int - default 2 + int + default 2 config DRIVER_TPM_I2C_BUS hex diff --git a/src/mainboard/google/veyron_pinky/Kconfig b/src/mainboard/google/veyron_pinky/Kconfig index c30039c5b9..1450139f48 100644 --- a/src/mainboard/google/veyron_pinky/Kconfig +++ b/src/mainboard/google/veyron_pinky/Kconfig @@ -61,8 +61,8 @@ config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US default 100 config BOOT_MEDIA_SPI_BUS - int - default 2 + int + default 2 config DRIVER_TPM_I2C_BUS hex diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig index dc7d0459ad..83c78c5195 100644 --- a/src/mainboard/google/veyron_rialto/Kconfig +++ b/src/mainboard/google/veyron_rialto/Kconfig @@ -49,8 +49,8 @@ config MAINBOARD_VENDOR default "Google" config BOOT_MEDIA_SPI_BUS - int - default 2 + int + default 2 config DRIVER_TPM_I2C_BUS hex diff --git a/src/mainboard/google/veyron_speedy/Kconfig b/src/mainboard/google/veyron_speedy/Kconfig index 1729b64991..5d9ddd599d 100644 --- a/src/mainboard/google/veyron_speedy/Kconfig +++ b/src/mainboard/google/veyron_speedy/Kconfig @@ -61,8 +61,8 @@ config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US default 100 config BOOT_MEDIA_SPI_BUS - int - default 2 + int + default 2 config DRIVER_TPM_I2C_BUS hex diff --git a/src/mainboard/hp/dl165_g6_fam10/Kconfig b/src/mainboard/hp/dl165_g6_fam10/Kconfig index bbf5e07ded..8376d895e1 100644 --- a/src/mainboard/hp/dl165_g6_fam10/Kconfig +++ b/src/mainboard/hp/dl165_g6_fam10/Kconfig @@ -1,7 +1,7 @@ if BOARD_HP_DL165_G6_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y + def_bool y select CPU_AMD_SOCKET_F_1207 select NORTHBRIDGE_AMD_AMDFAM10 select SOUTHBRIDGE_BROADCOM_BCM21000 diff --git a/src/mainboard/supermicro/h8scm/Kconfig.name b/src/mainboard/supermicro/h8scm/Kconfig.name index d502234cd2..4c5cbd90a2 100644 --- a/src/mainboard/supermicro/h8scm/Kconfig.name +++ b/src/mainboard/supermicro/h8scm/Kconfig.name @@ -1,2 +1,2 @@ config BOARD_SUPERMICRO_H8SCM - bool "H8SCM" + bool "H8SCM" diff --git a/src/mainboard/traverse/geos/Kconfig b/src/mainboard/traverse/geos/Kconfig index 945ab0975b..354ca810b4 100644 --- a/src/mainboard/traverse/geos/Kconfig +++ b/src/mainboard/traverse/geos/Kconfig @@ -26,7 +26,7 @@ config IRQ_SLOT_COUNT default 6 config PLLMSRlo - hex - default 0x00de602e + hex + default 0x00de602e endif # BOARD_TRAVERSE_GEOS diff --git a/src/mainboard/tyan/s8226/Kconfig.name b/src/mainboard/tyan/s8226/Kconfig.name index 78de0d26aa..881e56fafb 100644 --- a/src/mainboard/tyan/s8226/Kconfig.name +++ b/src/mainboard/tyan/s8226/Kconfig.name @@ -1,2 +1,2 @@ config BOARD_TYAN_S8226 - bool "S8226" + bool "S8226" diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index 37993aa709..e0942869aa 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -58,8 +58,8 @@ config RAMTOP default 0x400000 config BOOTBLOCK_NORTHBRIDGE_INIT - string - default "northbridge/amd/amdfam10/bootblock.c" + string + default "northbridge/amd/amdfam10/bootblock.c" config SB_HT_CHAIN_UNITID_OFFSET_ONLY bool @@ -112,9 +112,9 @@ endif config SVI_HIGH_FREQ bool default n - help - Select this for boards with a Voltage Regulator able to operate - at 3.4 MHz in SVI mode. Ignored unless the AMD CPU is rev C3. + help + Select this for boards with a Voltage Regulator able to operate + at 3.4 MHz in SVI mode. Ignored unless the AMD CPU is rev C3. menu "HyperTransport setup" #could be implemented for K8 (NORTHBRIDGE_AMD_AMDK8) diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index 65dc1736d8..23fa390d32 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -58,8 +58,8 @@ config HW_MEM_HOLE_SIZE_AUTO_INC default n config BOOTBLOCK_NORTHBRIDGE_INIT - string - default "northbridge/amd/amdk8/bootblock.c" + string + default "northbridge/amd/amdk8/bootblock.c" config SB_HT_CHAIN_UNITID_OFFSET_ONLY bool diff --git a/src/northbridge/amd/cimx/rd890/Kconfig b/src/northbridge/amd/cimx/rd890/Kconfig index 9642416631..04e9950d45 100644 --- a/src/northbridge/amd/cimx/rd890/Kconfig +++ b/src/northbridge/amd/cimx/rd890/Kconfig @@ -31,6 +31,6 @@ config REDIRECT_NBCIMX_TRACE_TO_SERIAL This Option allows you to redirect the AMD Northbridge CIMX Trace debug information to the serial console. - Warning: Only enable this option when debuging or tracing AMD CIMX code. + Warning: Only enable this option when debuging or tracing AMD CIMX code. endif # NORTHBRIDGE_AMD_CIMX_RD890 diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig index d071334315..62bd880fee 100644 --- a/src/northbridge/amd/pi/Kconfig +++ b/src/northbridge/amd/pi/Kconfig @@ -18,8 +18,8 @@ # config NORTHBRIDGE_AMD_PI - bool - default CPU_AMD_PI + bool + default CPU_AMD_PI select LATE_CBMEM_INIT if NORTHBRIDGE_AMD_PI diff --git a/src/northbridge/intel/i855/Kconfig b/src/northbridge/intel/i855/Kconfig index 44becf6ac5..25a1fd5979 100644 --- a/src/northbridge/intel/i855/Kconfig +++ b/src/northbridge/intel/i855/Kconfig @@ -1,34 +1,34 @@ config NORTHBRIDGE_INTEL_I855 bool - select HAVE_DEBUG_RAM_SETUP + select HAVE_DEBUG_RAM_SETUP select LATE_CBMEM_INIT choice - prompt "Onboard graphics" - default I855_VIDEO_MB_8MB - depends on NORTHBRIDGE_INTEL_I855 + prompt "Onboard graphics" + default I855_VIDEO_MB_8MB + depends on NORTHBRIDGE_INTEL_I855 config I855_VIDEO_MB_OFF - bool "Disabled, 0KB" + bool "Disabled, 0KB" config I855_VIDEO_MB_1MB - bool "Enabled, 1MB" + bool "Enabled, 1MB" config I855_VIDEO_MB_4MB - bool "Enabled, 4MB" + bool "Enabled, 4MB" config I855_VIDEO_MB_8MB - bool "Enabled, 8MB" + bool "Enabled, 8MB" config I855_VIDEO_MB_16MB - bool "Enabled, 16MB" + bool "Enabled, 16MB" config I855_VIDEO_MB_32MB - bool "Enabled, 32MB" + bool "Enabled, 32MB" endchoice config VIDEO_MB - int - default 0 if I855_VIDEO_MB_OFF - default 1 if I855_VIDEO_MB_1MB - default 4 if I855_VIDEO_MB_4MB - default 8 if I855_VIDEO_MB_8MB - default 16 if I855_VIDEO_MB_16MB - default 32 if I855_VIDEO_MB_32MB - depends on NORTHBRIDGE_INTEL_I855 + int + default 0 if I855_VIDEO_MB_OFF + default 1 if I855_VIDEO_MB_1MB + default 4 if I855_VIDEO_MB_4MB + default 8 if I855_VIDEO_MB_8MB + default 16 if I855_VIDEO_MB_16MB + default 32 if I855_VIDEO_MB_32MB + depends on NORTHBRIDGE_INTEL_I855 diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index ac25e896f2..891a8e096f 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -27,8 +27,8 @@ config SOUTHBRIDGE_AMD_CIMX_SB800 if SOUTHBRIDGE_AMD_CIMX_SB800 config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx/sb800/bootblock.c" + string + default "southbridge/amd/cimx/sb800/bootblock.c" config ENABLE_IDE_COMBINED_MODE bool "Enable SATA IDE combined mode" @@ -72,15 +72,15 @@ config SB800_SATA_RAID endchoice config SB800_SATA_MODE - hex + hex depends on (SB800_SATA_IDE || SB800_SATA_RAID || SB800_SATA_AHCI) default "0x0" if SB800_SATA_IDE default "0x1" if SB800_SATA_RAID default "0x2" if SB800_SATA_AHCI config SB_SUPERIO_HWM - bool - default n + bool + default n if SB800_SATA_AHCI config AHCI_ROM_ID @@ -100,8 +100,8 @@ if SB800_SATA_RAID config RAID_ROM_ID string "RAID device PCI IDs" default "1002,4393" - help - 1002,4392 for SATA NON-RAID5 module, 1002,4393 for SATA RAID5 mode + help + 1002,4392 for SATA NON-RAID5 module, 1002,4393 for SATA RAID5 mode config RAID_ROM_FILE string "RAID ROM path and filename" @@ -109,8 +109,8 @@ config RAID_ROM_FILE default "site-local/sb800/raid.bin" config RAID_MISC_ROM_FILE - string "RAID Misc ROM path and filename" - default "site-local/sb800/misc.bin" + string "RAID Misc ROM path and filename" + default "site-local/sb800/misc.bin" depends on SB800_SATA_RAID config RAID_MISC_ROM_POSITION diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig index 3bef95a113..be94c69592 100644 --- a/src/southbridge/amd/cimx/sb900/Kconfig +++ b/src/southbridge/amd/cimx/sb900/Kconfig @@ -29,30 +29,30 @@ config SATA_CONTROLLER_MODE hex default 0x0 help - 0x0 = Native IDE mode. - 0x1 = RAID mode. - 0x2 = AHCI mode. - 0x3 = Legacy IDE mode. - 0x4 = IDE->AHCI mode. - 0x5 = AHCI mode as 7804 ID (AMD driver). - 0x6 = IDE->AHCI mode as 7804 ID (AMD driver). + 0x0 = Native IDE mode. + 0x1 = RAID mode. + 0x2 = AHCI mode. + 0x3 = Legacy IDE mode. + 0x4 = IDE->AHCI mode. + 0x5 = AHCI mode as 7804 ID (AMD driver). + 0x6 = IDE->AHCI mode as 7804 ID (AMD driver). config PCIB_ENABLE bool default n help - n = Disable PCI Bridge Device 14 Function 4. - y = Enable PCI Bridge Device 14 Function 4. + n = Disable PCI Bridge Device 14 Function 4. + y = Enable PCI Bridge Device 14 Function 4. config ACPI_SCI_IRQ hex default 0x9 help - Set SCI IRQ to 9. + Set SCI IRQ to 9. config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx/sb900/bootblock.c" + string + default "southbridge/amd/cimx/sb900/bootblock.c" endif #SOUTHBRIDGE_AMD_CIMX_SB900 diff --git a/src/southbridge/amd/sb600/Kconfig b/src/southbridge/amd/sb600/Kconfig index 4d5fff49fd..1276bbbc3e 100644 --- a/src/southbridge/amd/sb600/Kconfig +++ b/src/southbridge/amd/sb600/Kconfig @@ -52,7 +52,7 @@ config SATA_MODE default 0 if SATA_MODE_AHCI config HPET_MIN_TICKS - hex - default 0x14 + hex + default 0x14 endif diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 767193ec5e..970605c5e9 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -79,9 +79,9 @@ config BUILD_WITH_FAKE_IFD support this yet. But there is a patch pending [1]. WARNING: Never write a complete coreboot.rom to your flash ROM if it - was built with a fake IFD. It just won't work. + was built with a fake IFD. It just won't work. - [1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html + [1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html config IFD_BIOS_SECTION depends on BUILD_WITH_FAKE_IFD diff --git a/src/southbridge/intel/i3100/Kconfig b/src/southbridge/intel/i3100/Kconfig index 9a535d7401..9dd8a38bb1 100644 --- a/src/southbridge/intel/i3100/Kconfig +++ b/src/southbridge/intel/i3100/Kconfig @@ -7,8 +7,8 @@ config SOUTHBRIDGE_INTEL_I3100 if SOUTHBRIDGE_INTEL_I3100 config HPET_MIN_TICKS - hex - default 0x90 + hex + default 0x90 endif diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index d8c73be468..f845d1d088 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -34,7 +34,7 @@ config EHCI_BAR default 0xfef00000 config BOOTBLOCK_SOUTHBRIDGE_INIT - string + string default "southbridge/intel/i82801gx/bootblock.c" config HPET_MIN_TICKS diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig index d8a32e50ca..7428d00895 100644 --- a/src/southbridge/intel/i82801ix/Kconfig +++ b/src/southbridge/intel/i82801ix/Kconfig @@ -40,7 +40,7 @@ config HPET_MIN_TICKS default 0x80 config BOOTBLOCK_SOUTHBRIDGE_INIT - string + string default "southbridge/intel/i82801ix/bootblock.c" endif diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index 07a5ac2899..b47bf992fd 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -69,9 +69,9 @@ config BUILD_WITH_FAKE_IFD support this yet. But there is a patch pending [1]. WARNING: Never write a complete coreboot.rom to your flash ROM if it - was built with a fake IFD. It just won't work. + was built with a fake IFD. It just won't work. - [1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html + [1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html config IFD_BIOS_SECTION diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index 0f520112cf..4797e96afd 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -71,9 +71,9 @@ config BUILD_WITH_FAKE_IFD support this yet. But there is a patch pending [1]. WARNING: Never write a complete coreboot.rom to your flash ROM if it - was built with a fake IFD. It just won't work. + was built with a fake IFD. It just won't work. - [1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html + [1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html config IFD_BIOS_SECTION depends on BUILD_WITH_FAKE_IFD diff --git a/src/southbridge/intel/sch/Kconfig b/src/southbridge/intel/sch/Kconfig index d320a53332..1c0f6f0163 100644 --- a/src/southbridge/intel/sch/Kconfig +++ b/src/southbridge/intel/sch/Kconfig @@ -47,8 +47,8 @@ config CMC_FILE binary. config HPET_MIN_TICKS - hex - default 0x80 + hex + default 0x80 endif |