diff options
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/s3_resume.h | 26 | ||||
| -rw-r--r-- | src/soc/amd/common/block/s3/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/s3/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/soc/amd/common/block/s3/s3_resume.c | 60 |
4 files changed, 91 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/s3_resume.h b/src/soc/amd/common/block/include/amdblocks/s3_resume.h new file mode 100644 index 0000000000..13f801021c --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/s3_resume.h @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __AMD_S3_RESUME_H__ +#define __AMD_S3_RESUME_H__ + +#include <stdint.h> + +int save_s3_info(void *nv_base, size_t nv_size, + void *vol_base, size_t vol_size); +void get_s3nv_info(void **base, size_t *size); +void get_s3vol_info(void **base, size_t *size); + +#endif /* __AMD_S3_RESUME_H__ */ diff --git a/src/soc/amd/common/block/s3/Kconfig b/src/soc/amd/common/block/s3/Kconfig index 85863ca42f..0880163d54 100644 --- a/src/soc/amd/common/block/s3/Kconfig +++ b/src/soc/amd/common/block/s3/Kconfig @@ -1,5 +1,7 @@ config SOC_AMD_COMMON_BLOCK_S3 bool default n + select CACHE_MRC_SETTINGS + select MRC_WRITE_NV_LATE help Select this option to add S3 related functions to the build. diff --git a/src/soc/amd/common/block/s3/Makefile.inc b/src/soc/amd/common/block/s3/Makefile.inc index f3dd97072a..7d950b0b3a 100644 --- a/src/soc/amd/common/block/s3/Makefile.inc +++ b/src/soc/amd/common/block/s3/Makefile.inc @@ -1,3 +1,6 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_S3),y) +romstage-$(CONFIG_HAVE_ACPI_RESUME) += s3_resume.c +ramstage-$(CONFIG_HAVE_ACPI_RESUME) += s3_resume.c + endif diff --git a/src/soc/amd/common/block/s3/s3_resume.c b/src/soc/amd/common/block/s3/s3_resume.c new file mode 100644 index 0000000000..4883fa5597 --- /dev/null +++ b/src/soc/amd/common/block/s3/s3_resume.c @@ -0,0 +1,60 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012-2017 Advanced Micro Devices, Inc. + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <cbmem.h> +#include <stage_cache.h> +#include <mrc_cache.h> +#include <console/console.h> +#include <amdblocks/s3_resume.h> + +/* Training data versioning is not supported or tracked. */ +#define DEFAULT_MRC_VERSION 0 + +void get_s3nv_info(void **base, size_t *size) +{ + struct region_device rdev; + + mrc_cache_get_current(MRC_TRAINING_DATA, DEFAULT_MRC_VERSION, &rdev); + *base = rdev_mmap_full(&rdev); + *size = region_device_sz(&rdev); + if (!*base || !*size) + printk(BIOS_ERR, "Error: S3 NV data not found\n"); + else + printk(BIOS_SPEW, "S3 NV data @0x%p 0x%0zx total bytes\n", + *base, *size); +} + +void get_s3vol_info(void **base, size_t *size) +{ + stage_cache_get_raw(STAGE_S3_DATA, base, size); + if (!*base || !*size) + printk(BIOS_ERR, "Error: S3 volatile data not found\n"); + else + printk(BIOS_SPEW, "S3 volatile data @0x%p 0x%0zx total bytes\n", + *base, *size); +} + +int save_s3_info(void *nv_base, size_t nv_size, void *vol_base, size_t vol_size) +{ + if (mrc_cache_stash_data(MRC_TRAINING_DATA, DEFAULT_MRC_VERSION, + nv_base, nv_size) < 0) { + printk(BIOS_ERR, "Failed to stash MRC data\n"); + return -1; + } + + stage_cache_add_raw(STAGE_S3_DATA, vol_base, vol_size); + return 0; +} |