diff options
| -rw-r--r-- | src/mainboard/google/samus/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/google/samus/smihandler.c | 8 |
2 files changed, 7 insertions, 3 deletions
diff --git a/src/mainboard/google/samus/devicetree.cb b/src/mainboard/google/samus/devicetree.cb index ce13a1daf2..95ab44be1e 100644 --- a/src/mainboard/google/samus/devicetree.cb +++ b/src/mainboard/google/samus/devicetree.cb @@ -52,7 +52,7 @@ chip soc/intel/broadwell # Disable PCIe CLKOUT 1-5 and CLKOUT_XDP register "icc_clock_disable" = "0x013b0000" - # Enable S0ix + # Disable S0ix for now register "s0ix_enable" = "0" device cpu_cluster 0 on diff --git a/src/mainboard/google/samus/smihandler.c b/src/mainboard/google/samus/smihandler.c index b43b46a427..932d606ba0 100644 --- a/src/mainboard/google/samus/smihandler.c +++ b/src/mainboard/google/samus/smihandler.c @@ -32,8 +32,8 @@ #include <broadwell/smm.h> #include "ec.h" -/* GPIO46 controls the WLAN_DISABLE_L signal. */ -#define GPIO_WLAN_DISABLE_L 46 +#define GPIO_SSD_RESET_L 47 +#define GPIO_WLAN_DISABLE_L 42 #define GPIO_LTE_DISABLE_L 59 int mainboard_io_trap_handler(int smif) @@ -103,6 +103,8 @@ void mainboard_smi_sleep(u8 slp_typ) 1, USB_CHARGE_MODE_DISABLED); } + /* Put SSD in reset to prevent leak. */ + set_gpio(GPIO_SSD_RESET_L, 0); /* Prevent leak from standby rail to WLAN rail in S3. */ set_gpio(GPIO_WLAN_DISABLE_L, 0); /* Disable LTE */ @@ -119,6 +121,8 @@ void mainboard_smi_sleep(u8 slp_typ) 1, USB_CHARGE_MODE_DISABLED); } + /* Put SSD in reset to prevent leak. */ + set_gpio(GPIO_SSD_RESET_L, 0); /* Prevent leak from standby rail to WLAN rail in S5. */ set_gpio(GPIO_WLAN_DISABLE_L, 0); /* Disable LTE */ |