diff options
| -rw-r--r-- | src/mainboard/google/nyan/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/nyan_big/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/nyan_blaze/romstage.c | 4 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra124/Kconfig | 13 |
4 files changed, 21 insertions, 4 deletions
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c index 10aeb5466c..cc1bfae95c 100644 --- a/src/mainboard/google/nyan/romstage.c +++ b/src/mainboard/google/nyan/romstage.c @@ -25,6 +25,7 @@ #include <device/device.h> #include <cbfs.h> #include <cbmem.h> +#include <console/cbmem_console.h> #include <console/console.h> #include <romstage_handoff.h> #include <vendorcode/google/chromeos/chromeos.h> @@ -215,6 +216,9 @@ static void __attribute__((noinline)) romstage(void) "fallback/coreboot_ram"); timestamp_add(TS_END_COPYRAM, timestamp_get()); +#if CONFIG_CONSOLE_CBMEM + cbmemc_reinit(); +#endif stage_exit(entry); } diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c index c239b4eb7e..48d3842aa2 100644 --- a/src/mainboard/google/nyan_big/romstage.c +++ b/src/mainboard/google/nyan_big/romstage.c @@ -25,6 +25,7 @@ #include <device/device.h> #include <cbfs.h> #include <cbmem.h> +#include <console/cbmem_console.h> #include <console/console.h> #include <romstage_handoff.h> #include <vendorcode/google/chromeos/chromeos.h> @@ -215,6 +216,9 @@ static void __attribute__((noinline)) romstage(void) "fallback/coreboot_ram"); timestamp_add(TS_END_COPYRAM, timestamp_get()); +#if CONFIG_CONSOLE_CBMEM + cbmemc_reinit(); +#endif stage_exit(entry); } diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c index c239b4eb7e..48d3842aa2 100644 --- a/src/mainboard/google/nyan_blaze/romstage.c +++ b/src/mainboard/google/nyan_blaze/romstage.c @@ -25,6 +25,7 @@ #include <device/device.h> #include <cbfs.h> #include <cbmem.h> +#include <console/cbmem_console.h> #include <console/console.h> #include <romstage_handoff.h> #include <vendorcode/google/chromeos/chromeos.h> @@ -215,6 +216,9 @@ static void __attribute__((noinline)) romstage(void) "fallback/coreboot_ram"); timestamp_add(TS_END_COPYRAM, timestamp_get()); +#if CONFIG_CONSOLE_CBMEM + cbmemc_reinit(); +#endif stage_exit(entry); } diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig index bdc4af9528..7862dd5b7b 100644 --- a/src/soc/nvidia/tegra124/Kconfig +++ b/src/soc/nvidia/tegra124/Kconfig @@ -30,8 +30,9 @@ config BOOTBLOCK_CPU_INIT # so the bootblock loading address must be placed after that. After the # handoff that area may be reclaimed for other uses, e.g. CBFS cache.) # -# 0x4000_0000 TTB (16KB). -# 0x4000_4000 CBFS mapping cache (96KB). +# 0x4000_0000 TTB (16K+32B). 32B is for L1 table of LPAE. +# 0x4000_4020 CBMEM console area (8K-32B) +# 0x4000_6000 CBFS mapping cache (88K) # 0x4001_C000 Stack (16KB... don't reduce without comparing LZMA scratchpad!). # 0x4002_0000 Bootblock (max 48KB). # 0x4002_C000 ROM stage (max 80KB). @@ -85,11 +86,15 @@ config TTB_BUFFER config CBFS_CACHE_ADDRESS hex "memory address to put CBFS cache data" - default 0x40004000 + default 0x40006000 config CBFS_CACHE_SIZE hex "size of CBFS cache data" - default 0x00018000 + default 0x00016000 + +config CBMEM_CONSOLE_PRERAM_BASE + hex "memory address of the CBMEM console buffer" + default 0x40004020 config TEGRA124_MODEL_TD570D bool "TD570D" |