diff options
| -rw-r--r-- | src/soc/intel/icelake/chip.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/icelake/include/soc/cpu.h | 3 |
2 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/intel/icelake/chip.h b/src/soc/intel/icelake/chip.h index d67a70c3dc..2b190cd5df 100644 --- a/src/soc/intel/icelake/chip.h +++ b/src/soc/intel/icelake/chip.h @@ -171,8 +171,6 @@ struct soc_intel_icelake_config { /* HeciEnabled decides the state of Heci1 at end of boot * Setting to 0 (default) disables Heci1 and hides the device from OS */ uint8_t HeciEnabled; - /* PL2 Override value in Watts */ - uint32_t tdp_pl2_override; /* Intel Speed Shift Technology */ uint8_t speed_shift_enable; /* Enable VR specific mailbox command diff --git a/src/soc/intel/icelake/include/soc/cpu.h b/src/soc/intel/icelake/include/soc/cpu.h index e0f3e52a1a..a23133367e 100644 --- a/src/soc/intel/icelake/include/soc/cpu.h +++ b/src/soc/intel/icelake/include/soc/cpu.h @@ -30,7 +30,4 @@ C_STATE_LATENCY_MICRO_SECONDS(C_STATE_LATENCY_CONTROL_ ##reg## _LIMIT, \ (IRTL_1024_NS >> 10)) -/* Configure power limits for turbo mode */ -void set_power_limits(u8 power_limit_1_time); - #endif |