aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/soc/intel/cannonlake/Kconfig13
-rw-r--r--src/soc/intel/cannonlake/Makefile.inc5
2 files changed, 17 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 101d71eb37..e6a2062c4a 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -3,6 +3,19 @@ config SOC_INTEL_CANNONLAKE
help
Intel Cannonlake support
+config SOC_INTEL_COFFEELAKE
+ bool
+ default n
+ select SOC_INTEL_CANNONLAKE
+ help
+ Intel Coffeelake support
+
+config CANNONLAKE_SOC_PCH_H
+ bool
+ default n
+ help
+ Choose this option if you have a PCH-H chipset.
+
if SOC_INTEL_CANNONLAKE
config CPU_SPECIFIC_OPTIONS
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index f8f91980bb..0a09eb6780 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -73,8 +73,11 @@ verstage-y += pmutil.c
verstage-y += spi.c
verstage-$(CONFIG_UART_DEBUG) += uart.c
-CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20
+ifeq ($(CONFIG_SOC_INTEL_COFFEELAKE),y)
+CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/coffeelake
+else
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake
+endif
CPPFLAGS_common += -I$(src)/soc/intel/cannonlake
CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include