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-rw-r--r--src/mainboard/google/poppy/variants/baseboard/devicetree.cb3
-rw-r--r--src/mainboard/google/poppy/variants/soraka/devicetree.cb3
2 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
index 789b21a7fc..cabf3dea9a 100644
--- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
@@ -24,6 +24,9 @@ chip soc/intel/skylake
# Enable DPTF
register "dptf_enable" = "1"
+ # Enable S0ix
+ register "s0ix_enable" = "1"
+
# FSP Configuration
register "ProbelessTrace" = "0"
register "EnableLan" = "0"
diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
index 9b8a18c2b0..3de9854bdc 100644
--- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
@@ -24,6 +24,9 @@ chip soc/intel/skylake
# Enable DPTF
register "dptf_enable" = "1"
+ # Enable S0ix
+ register "s0ix_enable" = "1"
+
# FSP Configuration
register "ProbelessTrace" = "0"
register "EnableLan" = "0"