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-rw-r--r--src/soc/amd/common/block/pci/Kconfig8
-rw-r--r--src/soc/amd/common/block/pci/Makefile.inc5
-rw-r--r--src/southbridge/amd/agesa/hudson/Kconfig1
-rw-r--r--src/southbridge/amd/cimx/sb800/Kconfig1
-rw-r--r--src/southbridge/amd/pi/hudson/Kconfig1
5 files changed, 15 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/pci/Kconfig b/src/soc/amd/common/block/pci/Kconfig
index 74ea69784d..a59d87eb54 100644
--- a/src/soc/amd/common/block/pci/Kconfig
+++ b/src/soc/amd/common/block/pci/Kconfig
@@ -1,6 +1,14 @@
config SOC_AMD_COMMON_BLOCK_PCI
bool
default n
+ select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
help
This option builds functions used to program PCI interrupt
routing, both PIC and APIC modes.
+
+config SOC_AMD_COMMON_BLOCK_PCI_MMCONF
+ bool
+ default n
+ help
+ Selecting this option adds the AMD-common enable_pci_mmconf function
+ to the build.
diff --git a/src/soc/amd/common/block/pci/Makefile.inc b/src/soc/amd/common/block/pci/Makefile.inc
index 1fed96e45a..78453d464f 100644
--- a/src/soc/amd/common/block/pci/Makefile.inc
+++ b/src/soc/amd/common/block/pci/Makefile.inc
@@ -1,8 +1,11 @@
ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PCI) += amd_pci_util.c
-# FIXME: This gets added when CONFIG_SOC_AMD_COMMON is set, which is a bit unexpected.
+ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PCI_MMCONF),y)
+
bootblock-y += amd_pci_mmconf.c
verstage_x86-y += amd_pci_mmconf.c
romstage-y += amd_pci_mmconf.c
postcar-y += amd_pci_mmconf.c
ramstage-y += amd_pci_mmconf.c
+
+endif # CONFIG_SOC_AMD_COMMON_BLOCK_PCI_MMCONF
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index b755fe1811..d0fbc49a36 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -16,6 +16,7 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
select HAVE_CF9_RESET_PREPARE
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
+ select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
config EHCI_BAR
hex
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index 96737cfbb6..ecfc1e1c5f 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -10,6 +10,7 @@ config SOUTHBRIDGE_AMD_CIMX_SB800
select HAVE_CF9_RESET_PREPARE
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
+ select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
if SOUTHBRIDGE_AMD_CIMX_SB800
config ENABLE_IDE_COMBINED_MODE
diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig
index 89dcad6086..c87d7a0904 100644
--- a/src/southbridge/amd/pi/hudson/Kconfig
+++ b/src/southbridge/amd/pi/hudson/Kconfig
@@ -19,6 +19,7 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
select HAVE_CF9_RESET_PREPARE
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
+ select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
config EHCI_BAR
hex