diff options
| -rw-r--r-- | src/cpu/intel/common/common.h | 4 | ||||
| -rw-r--r-- | src/cpu/intel/common/common_init.c | 12 | ||||
| -rw-r--r-- | src/include/cpu/intel/msr.h | 2 |
3 files changed, 7 insertions, 11 deletions
diff --git a/src/cpu/intel/common/common.h b/src/cpu/intel/common/common.h index aaeca1da10..57a51e5538 100644 --- a/src/cpu/intel/common/common.h +++ b/src/cpu/intel/common/common.h @@ -28,8 +28,8 @@ bool intel_ht_supported(void); bool intel_ht_sibling(void); /* - * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling - * as suggested in Intel document 325384-070US. + * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended changes + * to the enablement state as suggested in Intel document 325384-070US. */ void set_aesni_lock(void); diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c index e532c975cb..f189c598ac 100644 --- a/src/cpu/intel/common/common_init.c +++ b/src/cpu/intel/common/common_init.c @@ -266,10 +266,6 @@ void cpu_init_cppc_config(struct cppc_config *config, u32 version) } } -/* - * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended disabling - * as suggested in Intel document 325384-070US. - */ void set_aesni_lock(void) { msr_t msr; @@ -279,8 +275,8 @@ void set_aesni_lock(void) return; msr = rdmsr(MSR_FEATURE_CONFIG); - if ((msr.lo & 1) == 0) { - msr.lo |= 1; - wrmsr(MSR_FEATURE_CONFIG, msr); - } + if (msr.lo & AESNI_LOCK) + return; + + msr_set(MSR_FEATURE_CONFIG, AESNI_LOCK); } diff --git a/src/include/cpu/intel/msr.h b/src/include/cpu/intel/msr.h index 73dd32091b..0d11b5eece 100644 --- a/src/include/cpu/intel/msr.h +++ b/src/include/cpu/intel/msr.h @@ -6,6 +6,6 @@ */ #define MSR_FEATURE_CONFIG 0x13c -#define AESNI_LOCK_BIT 0 +#define AESNI_LOCK (1 << 0) #endif /* CPU_INTEL_MSR_H */ |